JPWO2014175062A1 - パワー半導体モジュールおよびその製造方法、電力変換器 - Google Patents
パワー半導体モジュールおよびその製造方法、電力変換器 Download PDFInfo
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- JPWO2014175062A1 JPWO2014175062A1 JP2015513666A JP2015513666A JPWO2014175062A1 JP WO2014175062 A1 JPWO2014175062 A1 JP WO2014175062A1 JP 2015513666 A JP2015513666 A JP 2015513666A JP 2015513666 A JP2015513666 A JP 2015513666A JP WO2014175062 A1 JPWO2014175062 A1 JP WO2014175062A1
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- insulating layer
- power semiconductor
- metal block
- semiconductor module
- metal plate
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/003—Constructional details, e.g. physical layout, assembly, wiring or busbar connections
Abstract
Description
図2aにおいて、最初に、1.0mm〜5.0mm程度の厚さの銅板を、プレス加工により、正方形または長方形に打ち抜いて、上部に凸状の段差部12aを有する金属ブロック1を形成する。図中の符号で13aは段差部12aの底面である。
[A]プラズマ溶射法を用いる場合
絶縁層2の形成に必要なセラミックス微粒子14には酸化珪素、酸化アルミニウム、窒化珪素、窒化アルミニウム、窒化ホウ素、の少なくとも1種によるセラミックス微粒子を用いればよい。
エアロゾルデポジション法とは、微粒子あるいは超微粒子原料をガスと混合してエアロゾル化し、ノズルを通して基板(ここでは金属ブロック1)に皮膜を形成する技術である。ガスにはヘリウムもしくは空気が用いられる。皮膜形成装置はエアロゾル化チャンバーと成膜チャンバーから構成されている。成膜チャンバーは真空ポンプで50〜1kPa前後に減圧する。
粒径0.1〜2μmのセラミックス微粒子14aを高速で金属ブロック1上に吹付けると、その時の衝突エネルギーで10〜30nm前後の微結晶粒子に破砕され新生面が形成され表面が活性化され粒子同士が結合される。したがって、緻密なナノ結晶組織のセラミックス膜(絶縁層2)が形成される。また、このセラミックス膜(絶縁層2)は、特に温度を上げることなく常温で形成可能である。
図2cにおいて、絶縁層付金属ブロック3の上面の金属ブロック1が露出した開口部16(素子実装領域)にパワー半導体素子(半導体チップ)4をはんだなどで固着して電気的・機械的に接合する。
図3dにおいて、前記絶縁層付金属ブロック3を取り付ける金属板5を用意する。
金属板5の中央付近に、絶縁層付金属ブロック3を嵌合・固定するための庇付貫通孔17を形成する。この庇付貫通孔17の庇17aは絶縁層付金属ブロック3の凸状の段差部12の底面13と接触して金属板5から伝達される下方への圧力Pを絶縁層付金属ブロック3の底面13に伝える働きをする。そのため、この金属板5には、高い熱伝導性と高い剛性が要求され、例えば、アルミニム板や銅板を用いる。金属板5の厚みtは、面積によって変わるが、たわみが生じないように1mm〜5mm程度に設定するとよい。図中の符号の17bは前記したように庇17aの箇所の開口部である。
図3eにおいて、前記絶縁層付金属ブロック3を金属板5の庇付貫通孔17に嵌合・固定する。このとき、庇付貫通孔17の庇17aから絶縁層付金属ブロック3の凸状の段差部12の底面13に金属板5の圧力Pが伝達するようにするために庇17aと段差部12の底面13を接触させる。ここで、凸状の段差部12の突出した箇所12bと庇17aの箇所の開口部17bとが互いに位置が合うように設計されている。また、絶縁層付金属ブロック3が庇付貫通孔17から抜けないように接着剤を介して嵌合・固定してもよい。
次に、金属板5に絶縁層付金属ブロック3を嵌合・固定する方法について説明する。
図3fにおいて、前記金属板5上に貼り付けるプリント基板6を用意する。このプリント基板6は例えばガラスエポキシ(ガラスファイバで強化されたエポキシ樹脂)などで構成される絶縁基板6bと、この絶縁基板6b上に形成された回路パターン6aとで構成され、中央部には金属板5の庇付貫通孔17の庇17aの箇所の開口部17bに対応する開口部19が形成されている。また、プリント基板6の外周部にはヒートシンク11にネジで固定するための取り付け孔21が形成されている。
図4iにおいて、パワー半導体素子4やプリント基板6に固着した電子部品8およびプリント基板6の回路パターン6a同士を電気的に絶縁したり表面保護したりするために、樹脂ケース9を金属板5に(図ではプリント基板6も含めて)固着した後で、樹脂ケース9内をシリコーンゲルなどの封止材10で充填する。なお、封止材10としては、エポキシ樹脂やウレタン樹脂などの充填材を用いても良い。このような工程を経て、パワー半導体モジュール100が完成する。
エアロゾルデポジション法では、室温(常温)で成膜が可能であり、かつ音速レベルのスピードでサブミクロンオーダーのセラミックス微粒子を基板に衝突させるため、活性な新生面が露出したセラミックス微粒子が結合する。また、プラズマ溶射法によっても同様である。いずれの方法においても、非常にち密な電気絶縁膜であるセラミックス微粒子層を形成することが可能となり、膜内に空孔(ボイド)が含まれないため、従来の焼結法により形成されたセラミックス板よりも単位長さ当たりの破壊電圧が10倍程度向上する。
熱伝導率はバルクと同等であり、熱伝導率は例えば酸化アルミニウム(Al2O3)で約20W/m・K、窒化アルミニウム(AlN)で約160〜180W/m・K、窒化珪素(Si3N4)で約80W/m・K程度確保できる。これに加えて単位長さ当たりの破壊電圧が向上するため、絶縁層2を薄く形成することができ、このため全体の熱抵抗が低くなる。
これらの点により、絶縁層2の高絶縁と低熱抵抗とを共に確保することが可能となる。
Claims (13)
- 庇付貫通孔を有する金属板と、
金属ブロックの上面以外の各面と、該上面の素子実装領域を除く部分にセラミックス材料からなる絶縁層が直接形成された絶縁層付金属ブロックとを備え、
前記金属板の前記庇付貫通孔内に前記絶縁層付金属ブロックが、その上部側が前記庇付貫通孔の庇に当接するように嵌合されているとともに、
前記金属ブロックの上面の前記素子実装領域にパワー半導体素子が固着され、
前記パワー半導体素子と前記金属板上に絶縁材を介して配設された回路パターンとが接続導体で接続されている
ことを特徴とするパワー半導体モジュール。 - 前記絶縁層付金属ブロックは、上部に凸状の段差部を有する金属ブロックの上面以外の各面と、該上面の素子実装領域を除く部分にセラミックス材料からなる絶縁層が直接形成されてなり、前記金属板の前記庇付貫通孔内に前記絶縁層付金属ブロックが、前記段差部の底面に形成された絶縁層が前記庇付貫通孔の庇に当接するように嵌合されていることを特徴とする請求項1に記載のパワー半導体モジュール。
- 前記絶縁層付金属ブロックの底面が前記金属板の裏面から突出していることを特徴とする請求項1または2に記載のパワー半導体モジュール。
- 前記絶縁層の厚みが、50μm以上、2000μm以下であることを特徴とする請求項1〜3のいずれか一項に記載のパワー半導体モジュール。
- 前記絶縁層は、酸化珪素、酸化アルミニウム、窒化珪素、窒化アルミニウム、窒化ホウ素からなるフィラー群の少なくとも1種類からなるセラミックス層であることを特徴とする請求項1〜4のいずれか一項に記載のパワー半導体モジュール。
- 前記絶縁層は、前記フィラー群の少なくとも1種によるセラミックス微粒子をプラズマ溶射法にて堆積させることにより形成したことを特徴とする請求項5に記載のパワー半導体モジュール。
- 前記絶縁層は、前記フィラー群の少なくとも1種によるセラミックス微粒子をエアロゾルデポジション法にて堆積させることにより形成したことを特徴とする請求項5に記載のパワー半導体モジュール。
- 前記回路パターンは前記金属板上に固着されたプリント基板の回路パターンであり、この回路パターンに電子部品が固着されていることを特徴とする請求項1〜7のいずれか一項に記載のパワー半導体モジュール。
- 前記プリント基板の上方に、電子部品が固着した別のプリント基板を配設していることを特徴とする請求項8に記載のパワー半導体モジュール。
- 請求項1〜9のいずれか一項に記載のパワー半導体モジュールと、ヒートシンクとを備え、前記金属ブロックの下面が前記絶縁層を介して前記ヒートシンクに当接するようにして前記パワー半導体モジュールが前記ヒートシンクに固定されていることを特徴とする電力変換器。
- 金属板に庇付貫通孔を形成する工程と、
金属ブロックの上面以外の各面と、該上面の素子実装領域を除く部分にセラミックス材料からなる絶縁層を直接形成して絶縁層付金属ブロックを構成する工程と、
前記金属ブロックの上面の前記素子実装領域にパワー半導体素子を固着する工程と、
前記金属板の前記庇付貫通孔内に前記絶縁層付金属ブロックを、その上部側が前記庇付貫通孔の庇に当接するように嵌合して固定する工程と、
前記金属板上に絶縁材を介して回路パターンを形成する工程と、
前記パワー半導体素子と前記回路パターンとを接続導体で接続する工程と、
を含むことを特徴とするパワー半導体モジュールの製造方法。 - 上部に凸状の段差部を有する金属ブロックの上面以外の各面と、該上面の素子実装領域を除く部分にセラミックス材料からなる絶縁層を直接形成して前記絶縁層付金属ブロックを構成するとともに、前記金属板の前記庇付貫通孔内に前記絶縁層付金属ブロックを、前記段差部の底面に形成された絶縁層が前記庇付貫通孔の庇に当接するように嵌合して固定することを特徴とする請求項11に記載のパワー半導体モジュールの製造方法。
- 前記絶縁層が、酸化珪素、酸化アルミニウム、窒化珪素、窒化アルミニウム、窒化ホウ素からなるフィラー群の少なくとも1種類によるセラミックス微粒子をプラズマ溶射法、エアロゾルデポジション法またはスパッタ法のいずれかを用いて堆積させることにより形成されることを特徴とする請求項11または12に記載のパワー半導体モジュールの製造方法。
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