JPS6412413B2 - - Google Patents
Info
- Publication number
- JPS6412413B2 JPS6412413B2 JP54110155A JP11015579A JPS6412413B2 JP S6412413 B2 JPS6412413 B2 JP S6412413B2 JP 54110155 A JP54110155 A JP 54110155A JP 11015579 A JP11015579 A JP 11015579A JP S6412413 B2 JPS6412413 B2 JP S6412413B2
- Authority
- JP
- Japan
- Prior art keywords
- flip
- flop
- output
- pulse converter
- flop cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000005669 field effect Effects 0.000 claims description 33
- 230000000737 periodic effect Effects 0.000 claims description 8
- 239000004065 semiconductor Substances 0.000 claims description 7
- 230000007704 transition Effects 0.000 claims description 7
- 238000006243 chemical reaction Methods 0.000 claims description 4
- 238000005516 engineering process Methods 0.000 description 8
- 230000009471 action Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 230000008859 change Effects 0.000 description 2
- 238000006880 cross-coupling reaction Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000009434 installation Methods 0.000 description 2
- 230000008901 benefit Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000002123 temporal effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
- H03K5/151—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with two complementary outputs
- H03K5/1515—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with two complementary outputs non-overlapping
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Manipulation Of Pulses (AREA)
- Analogue/Digital Conversion (AREA)
- Pulse Circuits (AREA)
- Logic Circuits (AREA)
- Dc-Dc Converters (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE2837855A DE2837855C2 (de) | 1978-08-30 | 1978-08-30 | Impulswandler zur Taktversorgung von digitalen Halbleiterschaltungen |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5534597A JPS5534597A (en) | 1980-03-11 |
| JPS6412413B2 true JPS6412413B2 (enExample) | 1989-02-28 |
Family
ID=6048272
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11015579A Granted JPS5534597A (en) | 1978-08-30 | 1979-08-29 | Pulse converter for supplying clock to digital semiconductor circuit |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US4283639A (enExample) |
| JP (1) | JPS5534597A (enExample) |
| DE (1) | DE2837855C2 (enExample) |
| FR (1) | FR2435160A1 (enExample) |
| GB (1) | GB2030403B (enExample) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5787620A (en) * | 1980-11-20 | 1982-06-01 | Fujitsu Ltd | Clock generating circuit |
| US4467224A (en) * | 1982-03-18 | 1984-08-21 | Rca Corporation | System for applying a high voltage source to a CRT through a capacitive load |
| DE3217264A1 (de) * | 1982-05-07 | 1983-11-10 | Siemens AG, 1000 Berlin und 8000 München | Integrierter impulsformer |
| IT1210945B (it) * | 1982-10-22 | 1989-09-29 | Ates Componenti Elettron | Circuito di interfaccia per generatori di segnali di sincronismo a due fasi nonsovrapposte. |
| JPS59121697A (ja) * | 1982-12-27 | 1984-07-13 | Toshiba Corp | シフトレジスタ |
| US4789822A (en) * | 1984-07-18 | 1988-12-06 | Naoyuki Ohmatoi | Three-electrode sensor for phase comparison and pulse phase adjusting circuit for use with the sensor |
| DE3525085A1 (de) * | 1985-07-13 | 1987-01-22 | Stribel Gmbh | Einrichtung fuer ein kraftfahrzeug |
| JPS63110811A (ja) * | 1986-10-28 | 1988-05-16 | Mitsubishi Electric Corp | クロツクジエネレ−タ |
| JPH0797710B2 (ja) * | 1990-06-12 | 1995-10-18 | 松下電器産業株式会社 | 電子機器 |
| US5357204A (en) * | 1993-09-01 | 1994-10-18 | Intel Corporation | One-shot clock generator circuit |
| JP3441780B2 (ja) * | 1994-02-21 | 2003-09-02 | 日本テキサス・インスツルメンツ株式会社 | クロック信号生成回路 |
| US5541527A (en) * | 1995-10-31 | 1996-07-30 | Sgs-Thomson Microelectronics, Inc. | PECL buffer |
| JP2994272B2 (ja) * | 1996-08-23 | 1999-12-27 | 九州日本電気株式会社 | 多相クロック発生回路 |
| US6181182B1 (en) * | 1999-03-18 | 2001-01-30 | Agilent Technologies | Circuit and method for a high gain, low input capacitance clock buffer |
| RU2165674C1 (ru) * | 2000-05-17 | 2001-04-20 | Государственное предприятие Научно-исследовательский технологический институт им. А.П. Александрова | Способ формирования спектрометрических импульсов и устройство для его осуществления (варианты) |
| US6310499B1 (en) * | 2000-07-17 | 2001-10-30 | Hewlett-Packard Company | Methods and apparatus for adjusting the deadtime between non-overlapping clock signals |
| GB2398192B (en) * | 2003-02-04 | 2006-02-01 | Transparent Engineering Limited | Improvements in or relating to an electronic device |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3393367A (en) * | 1965-12-08 | 1968-07-16 | Rca Corp | Circuit for generating two consecutive same-duration pulses, each on separate outputterminals, regardless of triggering-pulse duration |
| US3473051A (en) * | 1966-02-08 | 1969-10-14 | Sylvania Electric Prod | Bistable logic circuit |
| DE2015129A1 (de) | 1969-04-07 | 1970-10-15 | Institut für Elektro-Anlagen, Berlin | Patentwesen, Ost-Berlin WPI39039 Steuerbarer Taktgenerator für digitale informationsverarbeitende Systeme |
| US3619793A (en) * | 1969-11-05 | 1971-11-09 | Atlantic Richfield Co | Digital waveform generator with adjustable time shift and automatic phase control |
| JPS4912853U (enExample) * | 1972-05-10 | 1974-02-02 | ||
| DE2345837A1 (de) * | 1973-09-12 | 1975-03-20 | Merk Gmbh Telefonbau Fried | Schaltungsanordnung fuer einen mindestens zwei zueinander phasenverschobene taktfolgen gleicher frequenz liefernden elektronischen taktgenerator |
| DE2401781C2 (de) * | 1974-01-15 | 1981-11-19 | Siemens AG, 1000 Berlin und 8000 München | Anordnung zur Takterzeugung für ladungsgekoppelte Schaltungen |
| US3961269A (en) * | 1975-05-22 | 1976-06-01 | Teletype Corporation | Multiple phase clock generator |
| DE2713319C2 (de) * | 1977-03-25 | 1983-08-18 | Siemens AG, 1000 Berlin und 8000 München | Taktgeber für digitale Halbleiterschaltungen |
-
1978
- 1978-08-30 DE DE2837855A patent/DE2837855C2/de not_active Expired
-
1979
- 1979-08-01 US US06/062,767 patent/US4283639A/en not_active Expired - Lifetime
- 1979-08-29 FR FR7921667A patent/FR2435160A1/fr active Granted
- 1979-08-29 JP JP11015579A patent/JPS5534597A/ja active Granted
- 1979-08-30 GB GB7930136A patent/GB2030403B/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| GB2030403A (en) | 1980-04-02 |
| DE2837855A1 (de) | 1980-03-13 |
| JPS5534597A (en) | 1980-03-11 |
| FR2435160A1 (fr) | 1980-03-28 |
| US4283639A (en) | 1981-08-11 |
| GB2030403B (en) | 1982-11-10 |
| FR2435160B1 (enExample) | 1984-02-03 |
| DE2837855C2 (de) | 1984-03-29 |
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