JPS63140561A - 半導体集積回路の製造方法 - Google Patents

半導体集積回路の製造方法

Info

Publication number
JPS63140561A
JPS63140561A JP61288153A JP28815386A JPS63140561A JP S63140561 A JPS63140561 A JP S63140561A JP 61288153 A JP61288153 A JP 61288153A JP 28815386 A JP28815386 A JP 28815386A JP S63140561 A JPS63140561 A JP S63140561A
Authority
JP
Japan
Prior art keywords
conductivity type
impurity layer
oxide film
type
impurity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61288153A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0582985B2 (enrdf_load_stackoverflow
Inventor
Atsushi Nakano
敦 中野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61288153A priority Critical patent/JPS63140561A/ja
Publication of JPS63140561A publication Critical patent/JPS63140561A/ja
Publication of JPH0582985B2 publication Critical patent/JPH0582985B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H10D84/617Combinations of vertical BJTs and only diodes

Landscapes

  • Bipolar Integrated Circuits (AREA)
JP61288153A 1986-12-02 1986-12-02 半導体集積回路の製造方法 Granted JPS63140561A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61288153A JPS63140561A (ja) 1986-12-02 1986-12-02 半導体集積回路の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61288153A JPS63140561A (ja) 1986-12-02 1986-12-02 半導体集積回路の製造方法

Publications (2)

Publication Number Publication Date
JPS63140561A true JPS63140561A (ja) 1988-06-13
JPH0582985B2 JPH0582985B2 (enrdf_load_stackoverflow) 1993-11-24

Family

ID=17726489

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61288153A Granted JPS63140561A (ja) 1986-12-02 1986-12-02 半導体集積回路の製造方法

Country Status (1)

Country Link
JP (1) JPS63140561A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019004079A (ja) * 2017-06-16 2019-01-10 富士電機株式会社 半導体装置および半導体回路装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019004079A (ja) * 2017-06-16 2019-01-10 富士電機株式会社 半導体装置および半導体回路装置

Also Published As

Publication number Publication date
JPH0582985B2 (enrdf_load_stackoverflow) 1993-11-24

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