JPS623323A - デ−タフォ−マット変換方式 - Google Patents

デ−タフォ−マット変換方式

Info

Publication number
JPS623323A
JPS623323A JP14171585A JP14171585A JPS623323A JP S623323 A JPS623323 A JP S623323A JP 14171585 A JP14171585 A JP 14171585A JP 14171585 A JP14171585 A JP 14171585A JP S623323 A JPS623323 A JP S623323A
Authority
JP
Japan
Prior art keywords
data
circuit
bits
input
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14171585A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0444286B2 (enExample
Inventor
Yasuo Hara
原　泰男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP14171585A priority Critical patent/JPS623323A/ja
Publication of JPS623323A publication Critical patent/JPS623323A/ja
Publication of JPH0444286B2 publication Critical patent/JPH0444286B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Time-Division Multiplex Systems (AREA)
JP14171585A 1985-06-28 1985-06-28 デ−タフォ−マット変換方式 Granted JPS623323A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14171585A JPS623323A (ja) 1985-06-28 1985-06-28 デ−タフォ−マット変換方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14171585A JPS623323A (ja) 1985-06-28 1985-06-28 デ−タフォ−マット変換方式

Publications (2)

Publication Number Publication Date
JPS623323A true JPS623323A (ja) 1987-01-09
JPH0444286B2 JPH0444286B2 (enExample) 1992-07-21

Family

ID=15298511

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14171585A Granted JPS623323A (ja) 1985-06-28 1985-06-28 デ−タフォ−マット変換方式

Country Status (1)

Country Link
JP (1) JPS623323A (enExample)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4991341A (enExample) * 1972-12-29 1974-08-31
JPS57137934A (en) * 1981-02-20 1982-08-25 Hitachi Ltd Binary-coded decimal and binary code conversion processing system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4991341A (enExample) * 1972-12-29 1974-08-31
JPS57137934A (en) * 1981-02-20 1982-08-25 Hitachi Ltd Binary-coded decimal and binary code conversion processing system

Also Published As

Publication number Publication date
JPH0444286B2 (enExample) 1992-07-21

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