JPS6130749B2 - - Google Patents
Info
- Publication number
- JPS6130749B2 JPS6130749B2 JP55156354A JP15635480A JPS6130749B2 JP S6130749 B2 JPS6130749 B2 JP S6130749B2 JP 55156354 A JP55156354 A JP 55156354A JP 15635480 A JP15635480 A JP 15635480A JP S6130749 B2 JPS6130749 B2 JP S6130749B2
- Authority
- JP
- Japan
- Prior art keywords
- resin
- lead
- lead frame
- plated
- sealed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/456—Materials
- H10W70/457—Materials of metallic layers on leadframes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55156354A JPS5779653A (en) | 1980-11-06 | 1980-11-06 | Lead frame for resin-sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55156354A JPS5779653A (en) | 1980-11-06 | 1980-11-06 | Lead frame for resin-sealed semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5779653A JPS5779653A (en) | 1982-05-18 |
| JPS6130749B2 true JPS6130749B2 (https=) | 1986-07-15 |
Family
ID=15625916
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55156354A Granted JPS5779653A (en) | 1980-11-06 | 1980-11-06 | Lead frame for resin-sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5779653A (https=) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6396947A (ja) * | 1986-10-13 | 1988-04-27 | Mitsubishi Electric Corp | 半導体装置用リ−ドフレ−ム |
| US4876587A (en) * | 1987-05-05 | 1989-10-24 | National Semiconductor Corporation | One-piece interconnection package and process |
| FR2629272B1 (fr) * | 1988-03-22 | 1990-11-09 | Bull Sa | Support de circuit integre de haute densite et appareil d'etamage selectif des conducteurs du support |
-
1980
- 1980-11-06 JP JP55156354A patent/JPS5779653A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5779653A (en) | 1982-05-18 |
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