JPS61116858A - 層間絶縁膜の形成方法 - Google Patents

層間絶縁膜の形成方法

Info

Publication number
JPS61116858A
JPS61116858A JP59223351A JP22335184A JPS61116858A JP S61116858 A JPS61116858 A JP S61116858A JP 59223351 A JP59223351 A JP 59223351A JP 22335184 A JP22335184 A JP 22335184A JP S61116858 A JPS61116858 A JP S61116858A
Authority
JP
Japan
Prior art keywords
heat
insulating film
heat treatment
resin
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59223351A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0329298B2 (enExample
Inventor
Hiroshi Goto
広志 後藤
Takahiro Tsuchitani
槌谷 孝裕
Chuichi Takada
高田 忠一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59223351A priority Critical patent/JPS61116858A/ja
Priority to US06/698,901 priority patent/US4654113A/en
Priority to KR1019850000744A priority patent/KR900004968B1/ko
Priority to EP85300829A priority patent/EP0154419B1/en
Priority to DE8585300829T priority patent/DE3586109D1/de
Publication of JPS61116858A publication Critical patent/JPS61116858A/ja
Publication of JPH0329298B2 publication Critical patent/JPH0329298B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329Insulating materials
    • H01L23/53295Stacked insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329Insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP59223351A 1984-02-10 1984-10-24 層間絶縁膜の形成方法 Granted JPS61116858A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP59223351A JPS61116858A (ja) 1984-10-24 1984-10-24 層間絶縁膜の形成方法
US06/698,901 US4654113A (en) 1984-02-10 1985-02-06 Process for fabricating a semiconductor device
KR1019850000744A KR900004968B1 (ko) 1984-02-10 1985-02-06 반도체장치 제조방법
EP85300829A EP0154419B1 (en) 1984-02-10 1985-02-08 Process for producing an interconnection structure of a semiconductor device
DE8585300829T DE3586109D1 (de) 1984-02-10 1985-02-08 Verfahren zum herstellen einer verbindungsstruktur von einer halbleiteranordnung.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59223351A JPS61116858A (ja) 1984-10-24 1984-10-24 層間絶縁膜の形成方法

Publications (2)

Publication Number Publication Date
JPS61116858A true JPS61116858A (ja) 1986-06-04
JPH0329298B2 JPH0329298B2 (enExample) 1991-04-23

Family

ID=16796799

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59223351A Granted JPS61116858A (ja) 1984-02-10 1984-10-24 層間絶縁膜の形成方法

Country Status (1)

Country Link
JP (1) JPS61116858A (enExample)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61144849A (ja) * 1984-12-19 1986-07-02 Seiko Epson Corp 半導体装置の製造方法
JPS61196555A (ja) * 1985-02-26 1986-08-30 Nec Corp 多層配線の形成方法
JPS62176147A (ja) * 1985-10-03 1987-08-01 ビュル エス.アー. 高密度集積回路の構成要素の相互接続用多層金属配線網の形成法及び本形成法によつて形成される集積回路
JPS62295437A (ja) * 1986-06-14 1987-12-22 Yamaha Corp 多層配線形成法
JPH03201438A (ja) * 1989-12-28 1991-09-03 Mitsubishi Electric Corp 半導体装置の製造方法
KR970023723A (ko) * 1995-10-20 1997-05-30 김주용 반도체 소자의 금속 배선 방법

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5768050A (en) * 1980-10-15 1982-04-26 Hitachi Ltd Multilayer wire structure and manufacture thereof

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5768050A (en) * 1980-10-15 1982-04-26 Hitachi Ltd Multilayer wire structure and manufacture thereof

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61144849A (ja) * 1984-12-19 1986-07-02 Seiko Epson Corp 半導体装置の製造方法
JPS61196555A (ja) * 1985-02-26 1986-08-30 Nec Corp 多層配線の形成方法
JPS62176147A (ja) * 1985-10-03 1987-08-01 ビュル エス.アー. 高密度集積回路の構成要素の相互接続用多層金属配線網の形成法及び本形成法によつて形成される集積回路
JPS62295437A (ja) * 1986-06-14 1987-12-22 Yamaha Corp 多層配線形成法
JPH03201438A (ja) * 1989-12-28 1991-09-03 Mitsubishi Electric Corp 半導体装置の製造方法
KR970023723A (ko) * 1995-10-20 1997-05-30 김주용 반도체 소자의 금속 배선 방법

Also Published As

Publication number Publication date
JPH0329298B2 (enExample) 1991-04-23

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Legal Events

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