JPS60168251A - アドレス変換制御装置 - Google Patents

アドレス変換制御装置

Info

Publication number
JPS60168251A
JPS60168251A JP59025353A JP2535384A JPS60168251A JP S60168251 A JPS60168251 A JP S60168251A JP 59025353 A JP59025353 A JP 59025353A JP 2535384 A JP2535384 A JP 2535384A JP S60168251 A JPS60168251 A JP S60168251A
Authority
JP
Japan
Prior art keywords
address
address translation
buffer
logical
access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59025353A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0552539B2 (enrdf_load_html_response
Inventor
Hirosada Tone
利根 廣貞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59025353A priority Critical patent/JPS60168251A/ja
Publication of JPS60168251A publication Critical patent/JPS60168251A/ja
Publication of JPH0552539B2 publication Critical patent/JPH0552539B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP59025353A 1984-02-13 1984-02-13 アドレス変換制御装置 Granted JPS60168251A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59025353A JPS60168251A (ja) 1984-02-13 1984-02-13 アドレス変換制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59025353A JPS60168251A (ja) 1984-02-13 1984-02-13 アドレス変換制御装置

Publications (2)

Publication Number Publication Date
JPS60168251A true JPS60168251A (ja) 1985-08-31
JPH0552539B2 JPH0552539B2 (enrdf_load_html_response) 1993-08-05

Family

ID=12163490

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59025353A Granted JPS60168251A (ja) 1984-02-13 1984-02-13 アドレス変換制御装置

Country Status (1)

Country Link
JP (1) JPS60168251A (enrdf_load_html_response)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62222344A (ja) * 1986-03-25 1987-09-30 Hitachi Ltd アドレス変換機構
JPH01196643A (ja) * 1988-02-01 1989-08-08 Fujitsu Ltd アドレス変換方式
JPH01197857A (ja) * 1988-02-02 1989-08-09 Nec Corp アドレス変換回路
JPH03175548A (ja) * 1989-12-04 1991-07-30 Fujitsu Ltd マイクロプロセッサ及びアドレス制御方式
JPH0594370A (ja) * 1991-04-25 1993-04-16 Internatl Business Mach Corp <Ibm> コンピユータメモリシステム及び仮想メモリアドレツシング区分方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5727348A (en) * 1980-07-24 1982-02-13 Fujitsu Ltd Address converter

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5727348A (en) * 1980-07-24 1982-02-13 Fujitsu Ltd Address converter

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62222344A (ja) * 1986-03-25 1987-09-30 Hitachi Ltd アドレス変換機構
JPH01196643A (ja) * 1988-02-01 1989-08-08 Fujitsu Ltd アドレス変換方式
JPH01197857A (ja) * 1988-02-02 1989-08-09 Nec Corp アドレス変換回路
JPH03175548A (ja) * 1989-12-04 1991-07-30 Fujitsu Ltd マイクロプロセッサ及びアドレス制御方式
JPH0594370A (ja) * 1991-04-25 1993-04-16 Internatl Business Mach Corp <Ibm> コンピユータメモリシステム及び仮想メモリアドレツシング区分方法

Also Published As

Publication number Publication date
JPH0552539B2 (enrdf_load_html_response) 1993-08-05

Similar Documents

Publication Publication Date Title
CN101490655B (zh) 在微处理器内指示异常触发页面的方法和系统
KR970011208B1 (ko) 파이프라인된 기록버퍼 레지스터
JPH01503011A (ja) キャッシュマネッジメントシステムを含むデジタルデータ処理システム用汎用プロセッサユニット
US5041968A (en) Reduced instruction set computer (RISC) type microprocessor executing instruction functions indicating data location for arithmetic operations and result location
US5687353A (en) Merging data using a merge code from a look-up table and performing ECC generation on the merged data
TW444179B (en) A data processing system having an apparatus for exception tracking during out-of-order operation and method therefor
CN110515659B (zh) 一种原子指令的执行方法和装置
JPS60124754A (ja) バッファ記憶制御装置
JPS60168251A (ja) アドレス変換制御装置
JPS5868286A (ja) キヤツシユメモリおよびその作動方法
US5752271A (en) Method and apparatus for using double precision addressable registers for single precision data
US5134698A (en) Data processing system having a storage controller for transferring an arbitrary amount of data at an arbitrary address boundary between storages
JPH10116191A (ja) 圧縮命令用バッファを備えたプロセッサ
JPS5853075A (ja) 高速分離バツフアを備えた情報処理装置
JPS61264455A (ja) 主記憶一致制御方式
JPH04340145A (ja) キャッシュメモリ装置
JPH0322053A (ja) ムーブ・イン・バッファ制御方式
JPH01226056A (ja) アドレス変換回路
JP2917384B2 (ja) 情報処理装置
JP2842024B2 (ja) レジスタファイル回路
JPS6360427B2 (enrdf_load_html_response)
JPS60189043A (ja) プロセツサ
JPH0418658A (ja) 機能分散型計算機システム
JPS5840273B2 (ja) デ−タシヨリソウチ
JPS5972545A (ja) マイクロプログラム制御システム