JPS60113636U - 半導体集積回路装置 - Google Patents

半導体集積回路装置

Info

Publication number
JPS60113636U
JPS60113636U JP1984000403U JP40384U JPS60113636U JP S60113636 U JPS60113636 U JP S60113636U JP 1984000403 U JP1984000403 U JP 1984000403U JP 40384 U JP40384 U JP 40384U JP S60113636 U JPS60113636 U JP S60113636U
Authority
JP
Japan
Prior art keywords
integrated circuit
semiconductor integrated
circuit device
bonding
metal wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1984000403U
Other languages
English (en)
Other versions
JPH023621Y2 (ja
Inventor
原島　信之
Original Assignee
日本電気アイシーマイコンシステム株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気アイシーマイコンシステム株式会社 filed Critical 日本電気アイシーマイコンシステム株式会社
Priority to JP1984000403U priority Critical patent/JPS60113636U/ja
Publication of JPS60113636U publication Critical patent/JPS60113636U/ja
Application granted granted Critical
Publication of JPH023621Y2 publication Critical patent/JPH023621Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/4813—Connecting within a semiconductor or solid-state body, i.e. fly wire, bridge wire
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49112—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting a common bonding area on the semiconductor or solid-state body to different bonding areas outside the body, e.g. diverging wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第１図ａ、　ｂは従来の代表的な容器基板の電極配置の
例を示す平面図である。第２図ａ、　ｂは第、　１図の
ａ、ｂのパッケージに合せたポンディングパッドをもつ
チップの平面図である。第３図ａ。 ｂは第２図ａ、　ｂのヴレットを第１１１ａ、ｂのそれ
ぞれ対応した容器に収納した場合の内部平面図である。 第４図ａ、　ｂのペレットを対応しない容器に収納した
場合の内部平面図である。第５図は本考案の一実施例を
示す平面図である。第６図は本考案の一実施例のペレッ
トを第１図ａ、　ｂそれぞれの容器に収納した場合の内
部平面図である。 １０１．１０１’、６０１・・・容器基板の電極、　　
１０２．１０２’・・・チップ載置部、２０１，２０１
’、５０１・・・チップ、２０２，２０２’、５０２・
・・ボンディンググツド、３０１，３０１’、４０１．
４０１’、７０１，７０１’・・・金属細線、５０４・
・・配線層。

Claims (1)

    【実用新案登録請求の範囲】
  1. 同一の電極に接続されたボンディングバットを複数個有
    し、そのうちいずれかに金属細線がボンディングされて
    いる事を特徴とする半導体集積回路装置。
JP1984000403U 1984-01-06 1984-01-06 半導体集積回路装置 Granted JPS60113636U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984000403U JPS60113636U (ja) 1984-01-06 1984-01-06 半導体集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984000403U JPS60113636U (ja) 1984-01-06 1984-01-06 半導体集積回路装置

Publications (2)

Publication Number Publication Date
JPS60113636U true JPS60113636U (ja) 1985-08-01
JPH023621Y2 JPH023621Y2 (ja) 1990-01-29

Family

ID=30472210

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984000403U Granted JPS60113636U (ja) 1984-01-06 1984-01-06 半導体集積回路装置

Country Status (1)

Country Link
JP (1) JPS60113636U (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63162534U (ja) * 1987-04-10 1988-10-24
JPH08236585A (ja) * 1995-02-28 1996-09-13 Nec Corp 半導体装置
JP2007052725A (ja) * 2005-08-19 2007-03-01 Nec Electronics Corp 半導体集積回路装置の設計装置および配線方法ならびにプログラム
JP2015173205A (ja) * 2014-03-12 2015-10-01 株式会社東芝 半導体装置及びワイヤボンディング装置

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63162534U (ja) * 1987-04-10 1988-10-24
JPH08236585A (ja) * 1995-02-28 1996-09-13 Nec Corp 半導体装置
JP2007052725A (ja) * 2005-08-19 2007-03-01 Nec Electronics Corp 半導体集積回路装置の設計装置および配線方法ならびにプログラム
JP2015173205A (ja) * 2014-03-12 2015-10-01 株式会社東芝 半導体装置及びワイヤボンディング装置

Also Published As

Publication number Publication date
JPH023621Y2 (ja) 1990-01-29

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