JPS59143051U - 集積回路装置 - Google Patents
集積回路装置Info
- Publication number
- JPS59143051U JPS59143051U JP3699983U JP3699983U JPS59143051U JP S59143051 U JPS59143051 U JP S59143051U JP 3699983 U JP3699983 U JP 3699983U JP 3699983 U JP3699983 U JP 3699983U JP S59143051 U JPS59143051 U JP S59143051U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- circuit device
- wiring
- electrode parts
- recorded
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Wire Bonding (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
め要約のデータは記録されません。
Description
第1図および第2図、第5図はそ杆ぞれ従来例を示す平
面図および断面図、第3図、第4図および第6図はそれ
ぞれ本考案の実施例を示す断面図である。 1・・・・・・ペレット搭載ランド、2・・・・・・ス
テッチランド、3. 7. 8・・・・・・配線、5・
・・・・・半導体ペレット、4・・・・・・ボンディン
グ線、6・・・・・・チップコンデンサ、9・・・・・
・半田。
面図および断面図、第3図、第4図および第6図はそれ
ぞれ本考案の実施例を示す断面図である。 1・・・・・・ペレット搭載ランド、2・・・・・・ス
テッチランド、3. 7. 8・・・・・・配線、5・
・・・・・半導体ペレット、4・・・・・・ボンディン
グ線、6・・・・・・チップコンデンサ、9・・・・・
・半田。
Claims (1)
- 接続されるべき電極部間に配線が施された集積回路装置
において、前記配線は前記電極部の形成位置よりも下が
った位置に形成されていることを特徴とする集積回路装
置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3699983U JPS59143051U (ja) | 1983-03-15 | 1983-03-15 | 集積回路装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3699983U JPS59143051U (ja) | 1983-03-15 | 1983-03-15 | 集積回路装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59143051U true JPS59143051U (ja) | 1984-09-25 |
Family
ID=30167654
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3699983U Pending JPS59143051U (ja) | 1983-03-15 | 1983-03-15 | 集積回路装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59143051U (ja) |
-
1983
- 1983-03-15 JP JP3699983U patent/JPS59143051U/ja active Pending
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