JPS5999726A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS5999726A
JPS5999726A JP57210264A JP21026482A JPS5999726A JP S5999726 A JPS5999726 A JP S5999726A JP 57210264 A JP57210264 A JP 57210264A JP 21026482 A JP21026482 A JP 21026482A JP S5999726 A JPS5999726 A JP S5999726A
Authority
JP
Japan
Prior art keywords
film
ta2o5
ions
implanting
capacitance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57210264A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6367333B2 (https=
Inventor
Shinichi Inoue
井上　信市
Mamoru Maeda
守 前田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57210264A priority Critical patent/JPS5999726A/ja
Publication of JPS5999726A publication Critical patent/JPS5999726A/ja
Publication of JPS6367333B2 publication Critical patent/JPS6367333B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Formation Of Insulating Films (AREA)
JP57210264A 1982-11-29 1982-11-29 半導体装置の製造方法 Granted JPS5999726A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57210264A JPS5999726A (ja) 1982-11-29 1982-11-29 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57210264A JPS5999726A (ja) 1982-11-29 1982-11-29 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS5999726A true JPS5999726A (ja) 1984-06-08
JPS6367333B2 JPS6367333B2 (https=) 1988-12-26

Family

ID=16586502

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57210264A Granted JPS5999726A (ja) 1982-11-29 1982-11-29 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS5999726A (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6144057A (en) * 1990-07-24 2000-11-07 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device including a field effect transistor
US7335570B1 (en) 1990-07-24 2008-02-26 Semiconductor Energy Laboratory Co., Ltd. Method of forming insulating films, capacitances, and semiconductor devices

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6144057A (en) * 1990-07-24 2000-11-07 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device including a field effect transistor
US7335570B1 (en) 1990-07-24 2008-02-26 Semiconductor Energy Laboratory Co., Ltd. Method of forming insulating films, capacitances, and semiconductor devices

Also Published As

Publication number Publication date
JPS6367333B2 (https=) 1988-12-26

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