JPS5979594A - 電子要素を接続するための基板及びその製造方法 - Google Patents

電子要素を接続するための基板及びその製造方法

Info

Publication number
JPS5979594A
JPS5979594A JP57191731A JP19173182A JPS5979594A JP S5979594 A JPS5979594 A JP S5979594A JP 57191731 A JP57191731 A JP 57191731A JP 19173182 A JP19173182 A JP 19173182A JP S5979594 A JPS5979594 A JP S5979594A
Authority
JP
Japan
Prior art keywords
substrate
filament
coating
metal
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57191731A
Other languages
English (en)
Japanese (ja)
Inventor
チヤ−ルズ・エル・ラツセン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kollmorgen Technologies Corp
Original Assignee
Kollmorgen Technologies Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kollmorgen Technologies Corp filed Critical Kollmorgen Technologies Corp
Publication of JPS5979594A publication Critical patent/JPS5979594A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/02—Arrangements of circuit components or wiring on supporting structure
    • H05K7/06—Arrangements of circuit components or wiring on supporting structure on insulating boards, e.g. wiring harnesses
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/095—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers of vias therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09472—Recessed pad for surface mounting; Recessed electrode of component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10287—Metal wires as connectors or conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10727—Leadless chip carrier [LCC], e.g. chip-modules for cards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/103—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by bonding or embedding conductive wires or strips
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5525—Materials of bond wires comprising metals or metalloids, e.g. silver comprising copper [Cu]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24273—Structurally defined web or sheet [e.g., overall dimension, etc.] including aperture
    • Y10T428/24322—Composite web or sheet

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Chemically Coating (AREA)
JP57191731A 1981-04-14 1982-10-28 電子要素を接続するための基板及びその製造方法 Pending JPS5979594A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/254,132 US4500389A (en) 1981-04-14 1981-04-14 Process for the manufacture of substrates to interconnect electronic components

Publications (1)

Publication Number Publication Date
JPS5979594A true JPS5979594A (ja) 1984-05-08

Family

ID=22963047

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57191731A Pending JPS5979594A (ja) 1981-04-14 1982-10-28 電子要素を接続するための基板及びその製造方法

Country Status (13)

Country Link
US (1) US4500389A (https=)
JP (1) JPS5979594A (https=)
AT (1) AT385624B (https=)
AU (1) AU559827B2 (https=)
CA (1) CA1189196A (https=)
CH (1) CH660275A5 (https=)
DE (1) DE3211025A1 (https=)
ES (3) ES8304363A1 (https=)
FR (1) FR2503931B1 (https=)
GB (2) GB2096834B (https=)
IT (1) IT1147672B (https=)
NL (1) NL191641C (https=)
SE (1) SE449678B (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59121992A (ja) * 1982-12-22 1984-07-14 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション 光硬化可能な付着層にワイヤを配設する方法
JPS6284596A (ja) * 1985-07-19 1987-04-18 アドバンスト　インターコネクション　テクノロジー　インコーポレイテッド ワイヤ敷設回路板およびその製造法

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0168602A1 (en) * 1984-06-25 1986-01-22 Kollmorgen Technologies Corporation Method for making interconnection circuit boards
US4581098A (en) * 1984-10-19 1986-04-08 International Business Machines Corporation MLC green sheet process
GB2168857A (en) * 1984-11-14 1986-06-25 Int Standard Electric Corp Method and structure for interconnecting high frequency components
US4818322A (en) * 1985-07-19 1989-04-04 Kollmorgen Technologies Corporation Method for scribing conductors via laser
FR2585210B1 (fr) * 1985-07-19 1994-05-06 Kollmorgen Technologies Corp Procede de fabrication de plaquettes a circuits d'interconnexion
US4693778A (en) * 1985-07-19 1987-09-15 Kollmorgen Technologies Corporation Apparatus for making scribed circuit boards and circuit board modifications
US4743710A (en) * 1985-10-18 1988-05-10 Kollmorgen Technologies Corporation Coaxial interconnection boards
US4679321A (en) * 1985-10-18 1987-07-14 Kollmorgen Technologies Corporation Method for making coaxial interconnection boards
US4972050A (en) * 1989-06-30 1990-11-20 Kollmorgen Corporation Wire scribed circuit boards and methods of their manufacture
JP2811811B2 (ja) * 1989-10-03 1998-10-15 三菱電機株式会社 液晶表示装置
EP0468767B1 (en) * 1990-07-25 1996-10-09 Hitachi Chemical Co., Ltd. Coaxial conductor interconnection wiring board
DE4037488A1 (de) * 1990-11-24 1992-05-27 Bosch Gmbh Robert Leistungsbausteine mit elektrisch isolierender thermischer ankopplung
US6631558B2 (en) 1996-06-05 2003-10-14 Laservia Corporation Blind via laser drilling system
US6211485B1 (en) 1996-06-05 2001-04-03 Larry W. Burgess Blind via laser drilling system
US7062845B2 (en) 1996-06-05 2006-06-20 Laservia Corporation Conveyorized blind microvia laser drilling system
US6005991A (en) * 1997-11-26 1999-12-21 Us Conec Ltd Printed circuit board assembly having a flexible optical circuit and associated fabrication method
DE102006059127A1 (de) * 2006-09-25 2008-03-27 Osram Opto Semiconductors Gmbh Verfahren zur Herstellung einer Anordnung optoelektronischer Bauelemente und Anordnung optoelektronischer Bauelemente
DE102012223077A1 (de) * 2012-12-13 2014-06-18 Robert Bosch Gmbh Kontaktanordnung für einen mehrlagigen Schaltungsträger

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4899651A (https=) * 1972-02-28 1973-12-17
JPS5810893A (ja) * 1981-07-14 1983-01-21 日本電気株式会社 配線板およびその製造方法
JPS5857782A (ja) * 1981-10-01 1983-04-06 日本電気株式会社 配線板およびその製造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE394600B (sv) * 1967-03-17 1977-07-04 Thams J P B Forfarande for framstellning av en beleggning med onskad ytstruktur pa ett foremal
US3499219A (en) * 1967-11-06 1970-03-10 Bunker Ramo Interconnection means and method of fabrication thereof
US3674914A (en) * 1968-02-09 1972-07-04 Photocircuits Corp Wire scribed circuit boards and method of manufacture
DE1690347A1 (de) * 1968-02-24 1971-05-13 Telefunken Patent Verfahren zur Herstellung einer Verdrahtungsplatte
US3674602A (en) * 1969-10-09 1972-07-04 Photocircuits Corp Apparatus for making wire scribed circuit boards
JPS5550399B1 (https=) * 1970-03-05 1980-12-17
GB1379558A (en) * 1971-05-15 1975-01-02 Int Computers Ltd Methods of manufacture of multilayer circuit structures
US4030190A (en) * 1976-03-30 1977-06-21 International Business Machines Corporation Method for forming a multilayer printed circuit board
ZA781637B (en) * 1977-06-20 1979-02-28 Kollmorgen Tech Corp Wire scribed circuit board and method for the manufacture thereof
ZA775455B (en) * 1977-08-09 1978-07-26 Kollmorgen Tech Corp Improved methods and apparatus for making scribed circuit boards
US4258468A (en) * 1978-12-14 1981-03-31 Western Electric Company, Inc. Forming vias through multilayer circuit boards
DE3373610D1 (en) * 1982-12-22 1987-10-15 Ibm Method and apparatus for embedding wire in a photocurable adhesive

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4899651A (https=) * 1972-02-28 1973-12-17
JPS5810893A (ja) * 1981-07-14 1983-01-21 日本電気株式会社 配線板およびその製造方法
JPS5857782A (ja) * 1981-10-01 1983-04-06 日本電気株式会社 配線板およびその製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59121992A (ja) * 1982-12-22 1984-07-14 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション 光硬化可能な付着層にワイヤを配設する方法
JPS6284596A (ja) * 1985-07-19 1987-04-18 アドバンスト　インターコネクション　テクノロジー　インコーポレイテッド ワイヤ敷設回路板およびその製造法

Also Published As

Publication number Publication date
US4500389A (en) 1985-02-19
IT1147672B (it) 1986-11-26
DE3211025A1 (de) 1982-10-21
ES513838A0 (es) 1985-03-16
FR2503931B1 (fr) 1986-02-21
GB2096834A (en) 1982-10-20
ES513839A0 (es) 1983-11-01
NL191641B (nl) 1995-07-17
CA1189196A (en) 1985-06-18
ES511413A0 (es) 1983-03-01
NL8201570A (nl) 1982-11-01
AU8793982A (en) 1984-03-08
GB8422466D0 (en) 1984-10-10
GB2096834B (en) 1985-10-23
SE449678B (sv) 1987-05-11
AT385624B (de) 1988-04-25
ES8400213A1 (es) 1983-11-01
ES8503920A1 (es) 1985-03-16
GB2146177B (en) 1985-10-23
GB2146177A (en) 1985-04-11
NL191641C (nl) 1995-11-20
SE8202170L (sv) 1982-10-15
FR2503931A1 (fr) 1982-10-15
IT8248207A0 (it) 1982-04-09
DE3211025C2 (https=) 1991-11-21
ES8304363A1 (es) 1983-03-01
AU559827B2 (en) 1987-03-19
ATA116582A (de) 1987-09-15
CH660275A5 (de) 1987-03-31

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