JPS59167765A - メモリアクセス方式 - Google Patents

メモリアクセス方式

Info

Publication number
JPS59167765A
JPS59167765A JP58041177A JP4117783A JPS59167765A JP S59167765 A JPS59167765 A JP S59167765A JP 58041177 A JP58041177 A JP 58041177A JP 4117783 A JP4117783 A JP 4117783A JP S59167765 A JPS59167765 A JP S59167765A
Authority
JP
Japan
Prior art keywords
storage device
data processing
path
processing device
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58041177A
Other languages
English (en)
Japanese (ja)
Other versions
JPS645343B2 (enrdf_load_stackoverflow
Inventor
Masatoshi Koto
小藤　雅俊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP58041177A priority Critical patent/JPS59167765A/ja
Publication of JPS59167765A publication Critical patent/JPS59167765A/ja
Publication of JPS645343B2 publication Critical patent/JPS645343B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
JP58041177A 1983-03-11 1983-03-11 メモリアクセス方式 Granted JPS59167765A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58041177A JPS59167765A (ja) 1983-03-11 1983-03-11 メモリアクセス方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58041177A JPS59167765A (ja) 1983-03-11 1983-03-11 メモリアクセス方式

Publications (2)

Publication Number Publication Date
JPS59167765A true JPS59167765A (ja) 1984-09-21
JPS645343B2 JPS645343B2 (enrdf_load_stackoverflow) 1989-01-30

Family

ID=12601147

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58041177A Granted JPS59167765A (ja) 1983-03-11 1983-03-11 メモリアクセス方式

Country Status (1)

Country Link
JP (1) JPS59167765A (enrdf_load_stackoverflow)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52113639A (en) * 1976-03-19 1977-09-22 Nec Corp Channel coupling device equipped with diagnostic fucntion

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52113639A (en) * 1976-03-19 1977-09-22 Nec Corp Channel coupling device equipped with diagnostic fucntion

Also Published As

Publication number Publication date
JPS645343B2 (enrdf_load_stackoverflow) 1989-01-30

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