JPS59121699A - 冗長性回路変更装置 - Google Patents

冗長性回路変更装置

Info

Publication number
JPS59121699A
JPS59121699A JP57227427A JP22742782A JPS59121699A JP S59121699 A JPS59121699 A JP S59121699A JP 57227427 A JP57227427 A JP 57227427A JP 22742782 A JP22742782 A JP 22742782A JP S59121699 A JPS59121699 A JP S59121699A
Authority
JP
Japan
Prior art keywords
circuit
defective
pulse
signal
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57227427A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6240796B2 (enExample
Inventor
Noboru Kobayashi
登 小林
Satoshi Konishi
頴 小西
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP57227427A priority Critical patent/JPS59121699A/ja
Priority to US06/563,504 priority patent/US4630241A/en
Priority to EP83307804A priority patent/EP0115170B1/en
Priority to DE8383307804T priority patent/DE3382263D1/de
Publication of JPS59121699A publication Critical patent/JPS59121699A/ja
Publication of JPS6240796B2 publication Critical patent/JPS6240796B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/785—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Dram (AREA)
JP57227427A 1982-12-28 1982-12-28 冗長性回路変更装置 Granted JPS59121699A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP57227427A JPS59121699A (ja) 1982-12-28 1982-12-28 冗長性回路変更装置
US06/563,504 US4630241A (en) 1982-12-28 1983-12-20 Method of programming for programmable circuit in redundancy circuit system
EP83307804A EP0115170B1 (en) 1982-12-28 1983-12-21 Apparatus for programming for programmable circuit in redundancy circuit system
DE8383307804T DE3382263D1 (de) 1982-12-28 1983-12-21 Anordnung zur programmierung fuer programmierbare schaltung in redundanzschaltungssystem.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57227427A JPS59121699A (ja) 1982-12-28 1982-12-28 冗長性回路変更装置

Publications (2)

Publication Number Publication Date
JPS59121699A true JPS59121699A (ja) 1984-07-13
JPS6240796B2 JPS6240796B2 (enExample) 1987-08-31

Family

ID=16860674

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57227427A Granted JPS59121699A (ja) 1982-12-28 1982-12-28 冗長性回路変更装置

Country Status (4)

Country Link
US (1) US4630241A (enExample)
EP (1) EP0115170B1 (enExample)
JP (1) JPS59121699A (enExample)
DE (1) DE3382263D1 (enExample)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR890003691B1 (ko) * 1986-08-22 1989-09-30 삼성전자 주식회사 블럭 열 리던던씨 회로
JPH0752217B2 (ja) * 1986-12-20 1995-06-05 富士通株式会社 半導体装置
JPH0793037B2 (ja) * 1988-11-21 1995-10-09 三菱電機株式会社 半導体記憶装置
JPH02310898A (ja) * 1989-05-25 1990-12-26 Nec Corp メモリ回路
US5022008A (en) * 1989-12-14 1991-06-04 Texas Instruments Incorporated PROM speed measuring method
US5005158A (en) * 1990-01-12 1991-04-02 Sgs-Thomson Microelectronics, Inc. Redundancy for serial memory
US5157634A (en) * 1990-10-23 1992-10-20 International Business Machines Corporation Dram having extended refresh time
EP0499131A1 (en) * 1991-02-12 1992-08-19 Texas Instruments Incorporated High efficiency row redundancy for dynamic ram
JP2754953B2 (ja) * 1991-05-17 1998-05-20 日本電気株式会社 半導体メモリ装置
US5297094A (en) * 1991-07-17 1994-03-22 Sgs-Thomson Microelectronics, Inc. Integrated circuit memory device with redundant rows
JP3392477B2 (ja) * 1993-09-06 2003-03-31 株式会社東芝 半導体装置
KR0119888B1 (ko) * 1994-04-11 1997-10-30 윤종용 반도체 메모리장치의 결함구제방법 및 그 회로
JP3076195B2 (ja) * 1994-04-27 2000-08-14 日本電気株式会社 不揮発性半導体記憶装置
CN1070626C (zh) * 1994-09-01 2001-09-05 赵庆杞 微机中央信号装置
KR0140178B1 (ko) * 1994-12-29 1998-07-15 김광호 반도체 메모리장치의 결함 셀 구제회로 및 방법
US6148390A (en) * 1996-06-12 2000-11-14 Quicklogic Corporation Techniques and circuits for high yield improvements in programmable devices using redundant logic
DE10063688A1 (de) 2000-12-20 2002-07-18 Infineon Technologies Ag Schaltungsanordnung zur Ansteuerung einer programmierbaren Verbindung
DE10146931B4 (de) * 2001-09-24 2007-12-06 Qimonda Ag Verfahren und Anordnung zum Ersetzen fehlerhafter Speicherzellen in Datenverarbeitungsvorrichtungen
DE10164032B4 (de) * 2001-12-28 2008-10-23 Qimonda Ag Verfahren zum Aktivieren von Sicherungseinheiten in elektronischen Schaltungseinrichtungen
KR100462877B1 (ko) * 2002-02-04 2004-12-17 삼성전자주식회사 반도체 메모리 장치, 및 이 장치의 불량 셀 어드레스프로그램 회로 및 방법
US6819160B2 (en) 2002-11-13 2004-11-16 International Business Machines Corporation Self-timed and self-tested fuse blow
US7108357B2 (en) * 2004-02-13 2006-09-19 Hewlett-Packard Development Company, L.P. Device identification using a programmable memory circuit
US10020037B2 (en) * 2007-12-10 2018-07-10 Intel Corporation Capacity register file
US7768847B2 (en) 2008-04-09 2010-08-03 Rambus Inc. Programmable memory repair scheme
CN108665930B (zh) * 2017-04-01 2024-11-26 兆易创新科技集团股份有限公司 一种nand闪存芯片

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3758761A (en) * 1971-08-17 1973-09-11 Texas Instruments Inc Self-interconnecting/self-repairable electronic systems on a slice
US4250570B1 (en) * 1976-07-15 1996-01-02 Intel Corp Redundant memory circuit
US4358833A (en) * 1980-09-30 1982-11-09 Intel Corporation Memory redundancy apparatus for single chip memories
US4446534A (en) * 1980-12-08 1984-05-01 National Semiconductor Corporation Programmable fuse circuit
JPS57150197A (en) * 1981-03-11 1982-09-16 Nippon Telegr & Teleph Corp <Ntt> Storage circuit
US4464736A (en) * 1982-09-23 1984-08-07 Motorola, Inc. In-package E2 PROM redundancy

Also Published As

Publication number Publication date
DE3382263D1 (de) 1991-05-29
EP0115170B1 (en) 1991-04-24
US4630241A (en) 1986-12-16
EP0115170A2 (en) 1984-08-08
JPS6240796B2 (enExample) 1987-08-31
EP0115170A3 (en) 1987-04-15

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