JPS5895062U - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS5895062U
JPS5895062U JP19050481U JP19050481U JPS5895062U JP S5895062 U JPS5895062 U JP S5895062U JP 19050481 U JP19050481 U JP 19050481U JP 19050481 U JP19050481 U JP 19050481U JP S5895062 U JPS5895062 U JP S5895062U
Authority
JP
Japan
Prior art keywords
semiconductor equipment
semiconductor device
resin
device chips
recorded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19050481U
Other languages
English (en)
Inventor
小池　幹夫
鎌谷　道徳
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP19050481U priority Critical patent/JPS5895062U/ja
Publication of JPS5895062U publication Critical patent/JPS5895062U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第１図は従来の樹脂封入の半導体装置の断面図、第２図
は本考案の一実施例を示す樹脂封入の半導体装置の断面
図である。 尚、図において、１・・・・・・ベース上部、２・・・
・・・リード端子、３・・・・・・半導体装置ペレット
、４・・・・・・上部ボンディングワイヤー、５・・・
・・・封入樹脂、６・・・・・・下部半導体装置ペレッ
ト、７・・・・・・下部ボンディングワイヤー、である
。

Claims (1)

    【実用新案登録請求の範囲】
  1. 樹脂封入の半導体装置において、該半導体装置チップを
    固定するリードフレームの両面に半導体装置チップを塔
    載する事を特徴とする半導体装置。
JP19050481U 1981-12-21 1981-12-21 半導体装置 Pending JPS5895062U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19050481U JPS5895062U (ja) 1981-12-21 1981-12-21 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19050481U JPS5895062U (ja) 1981-12-21 1981-12-21 半導体装置

Publications (1)

Publication Number Publication Date
JPS5895062U true JPS5895062U (ja) 1983-06-28

Family

ID=30104071

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19050481U Pending JPS5895062U (ja) 1981-12-21 1981-12-21 半導体装置

Country Status (1)

Country Link
JP (1) JPS5895062U (ja)

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