JPS58178544A - リ−ドフレ−ム - Google Patents

リ−ドフレ−ム

Info

Publication number
JPS58178544A
JPS58178544A JP6147682A JP6147682A JPS58178544A JP S58178544 A JPS58178544 A JP S58178544A JP 6147682 A JP6147682 A JP 6147682A JP 6147682 A JP6147682 A JP 6147682A JP S58178544 A JPS58178544 A JP S58178544A
Authority
JP
Japan
Prior art keywords
flexible insulating
insulating plate
wirings
plate
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6147682A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0517709B2 (enrdf_load_stackoverflow
Inventor
Sekiya Marutsuka
丸塚 碩也
Ryosuke Hosobane
細羽 良弼
Eiichi Tsunashima
瑛一 綱島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp, Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electronics Corp
Priority to JP6147682A priority Critical patent/JPS58178544A/ja
Publication of JPS58178544A publication Critical patent/JPS58178544A/ja
Publication of JPH0517709B2 publication Critical patent/JPH0517709B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49517Additional leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP6147682A 1982-04-12 1982-04-12 リ−ドフレ−ム Granted JPS58178544A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6147682A JPS58178544A (ja) 1982-04-12 1982-04-12 リ−ドフレ−ム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6147682A JPS58178544A (ja) 1982-04-12 1982-04-12 リ−ドフレ−ム

Publications (2)

Publication Number Publication Date
JPS58178544A true JPS58178544A (ja) 1983-10-19
JPH0517709B2 JPH0517709B2 (enrdf_load_stackoverflow) 1993-03-09

Family

ID=13172148

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6147682A Granted JPS58178544A (ja) 1982-04-12 1982-04-12 リ−ドフレ−ム

Country Status (1)

Country Link
JP (1) JPS58178544A (enrdf_load_stackoverflow)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4721994A (en) * 1985-06-25 1988-01-26 Toray Silicone Co., Ltd. Lead frame for semiconductor devices
JPH0173948U (enrdf_load_stackoverflow) * 1988-10-28 1989-05-18
US5075760A (en) * 1988-01-18 1991-12-24 Texas Instruments Incorporated Semiconductor device package assembly employing flexible tape
US5084753A (en) * 1989-01-23 1992-01-28 Analog Devices, Inc. Packaging for multiple chips on a single leadframe
US6897092B2 (en) 1999-09-03 2005-05-24 Micron Technology, Inc. Method of supporting a substrate film

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5343475A (en) * 1976-10-01 1978-04-19 Seiko Epson Corp Flexible tape structure for gang bonding
JPS54161270A (en) * 1978-06-09 1979-12-20 Nec Corp Lead frame for integrated-circuit device
JPS5585051A (en) * 1978-12-22 1980-06-26 Hitachi Ltd Preparation of multilayer wiring structure
JPS5678255U (enrdf_load_stackoverflow) * 1979-11-07 1981-06-25
JPS5788752A (en) * 1980-11-25 1982-06-02 Hitachi Ltd Lead frame and semiconductor device prepared by using the same

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5343475A (en) * 1976-10-01 1978-04-19 Seiko Epson Corp Flexible tape structure for gang bonding
JPS54161270A (en) * 1978-06-09 1979-12-20 Nec Corp Lead frame for integrated-circuit device
JPS5585051A (en) * 1978-12-22 1980-06-26 Hitachi Ltd Preparation of multilayer wiring structure
JPS5678255U (enrdf_load_stackoverflow) * 1979-11-07 1981-06-25
JPS5788752A (en) * 1980-11-25 1982-06-02 Hitachi Ltd Lead frame and semiconductor device prepared by using the same

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4721994A (en) * 1985-06-25 1988-01-26 Toray Silicone Co., Ltd. Lead frame for semiconductor devices
US5075760A (en) * 1988-01-18 1991-12-24 Texas Instruments Incorporated Semiconductor device package assembly employing flexible tape
JPH0173948U (enrdf_load_stackoverflow) * 1988-10-28 1989-05-18
US5084753A (en) * 1989-01-23 1992-01-28 Analog Devices, Inc. Packaging for multiple chips on a single leadframe
US6897092B2 (en) 1999-09-03 2005-05-24 Micron Technology, Inc. Method of supporting a substrate film
US6975021B1 (en) * 1999-09-03 2005-12-13 Micron Technology, Inc. Carrier for substrate film

Also Published As

Publication number Publication date
JPH0517709B2 (enrdf_load_stackoverflow) 1993-03-09

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