JPS58103153U - ２進論理信号を反転するための集積回路 - Google Patents

２進論理信号を反転するための集積回路

Info

Publication number
JPS58103153U
JPS58103153U JP1982113491U JP11349182U JPS58103153U JP S58103153 U JPS58103153 U JP S58103153U JP 1982113491 U JP1982113491 U JP 1982113491U JP 11349182 U JP11349182 U JP 11349182U JP S58103153 U JPS58103153 U JP S58103153U
Authority
JP
Japan
Prior art keywords
field effect
effect transistor
output terminal
coupled
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1982113491U
Other languages
English (en)
Other versions
JPH0210678Y2 (ja
Inventor
ロバ−ト・シヤ−マン・グリ−ン
ハロルド・ウオ−レス・ド−チエル
バ−ノン・デイ−・マツケニ−
Original Assignee
モステツク・コ−ポレイシヨン
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by モステツク・コ−ポレイシヨン filed Critical モステツク・コ−ポレイシヨン
Publication of JPS58103153U publication Critical patent/JPS58103153U/ja
Application granted granted Critical
Publication of JPH0210678Y2 publication Critical patent/JPH0210678Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/0883—Combination of depletion and enhancement field effect transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09441—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type
    • H03K19/09443—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type using a combination of enhancement and depletion transistors
    • H03K19/09445—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type using a combination of enhancement and depletion transistors with active depletion transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Memories (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
添付図面の第１図、第２図および第３図はこの考案によ
る集積回路装置の一部分を、好ましい製造方法の各段階
にて例示している概略断面図、第４図および第５図はこ
の考案の回路応用を例示している図である。 １０・・・・・・集積回路装置、１２・・・・・・基板
、１４・・・・・・フィールド酸化物層、１６・・・・
・・ゲート酸化物層、１Ｂ・・・・・・ホトレジストマ
スク、２１）、　　２２．　２４・・・・・・Ｎ型領域
、２６・・・・・・ソース領域、２８・・・：・・ドレ
イン領域、３０・・・・・・ゲート、３１．　３２．　
３３゜３４・・・・・・チャネル、３６．３８・・・・
・・電極、４０・・・・・・ゲート電極、４２・・・−
・−・絶縁層、１００・・・・・・インバータ回Ｌ　Ｑ
　１　、　Ｑ２−−−−−−　トランジスタ、１０２・
・・・・・出力端子、１０４・・・・・・入力端子、１
１０・・・・・・プッシュプルバッファ回路、Ａ、　　
Ｂ。 Ｃ，Ｄ・・・・・・トランジスタ、１１２・・・・・・
入力端子、１１４．１１６・・・・・・出力端子。

Claims (1)

    【実用新案登録請求の範囲】
  1. 第１のしきい値電圧を有し且つプッシュブルバソファの
    入力段におけるロードとして使用するためにドレイン電
    圧を第１の出力端子に連結する第１の電界効果トランジ
    スタＢと、第２のしきい値電圧を有し前記第１の出力端
    子をソース電圧に連結する電界効果トランジスタＡであ
    って該電界効果トランジスタＡのゲートが前記入力段に
    おけるドライバとして使用するために入力端子に結合さ
    れている第２の電界効果トランジスタＡと、第３のしき
    い値電圧を有し且つドレイン電圧を第２の出力端子に連
    結する電界効果トランジスタＤであって該電界効果トラ
    ンジスタＤのゲートが前記第１の出力端子に結合されて
    いる第３の電界効果トランジスタＤと、前記第２のしき
    い値電圧を有し且つ前記第２の出力端子をソース電圧に
    連結する電界効果トランジスタＣであって該電界効果ト
    ランジスタＣのゲートが入力端子に結合されている第４
    の電界効果トランジスタＣとを備えた２進論理信号を反
    転するための集積回路。
JP1982113491U 1977-07-18 1982-07-28 ２進論理信号を反転するための集積回路 Granted JPS58103153U (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US816363 1977-07-18
US05/816,363 US4135102A (en) 1977-07-18 1977-07-18 High performance inverter circuits

Publications (2)

Publication Number Publication Date
JPS58103153U true JPS58103153U (ja) 1983-07-13
JPH0210678Y2 JPH0210678Y2 (ja) 1990-03-16

Family

ID=25220399

Family Applications (4)

Application Number Title Priority Date Filing Date
JP8760778A Pending JPS5496383A (en) 1977-07-18 1978-07-18 High performance ic and method of fabricating same
JP1982113491U Granted JPS58103153U (ja) 1977-07-18 1982-07-28 ２進論理信号を反転するための集積回路
JP1987074267U Pending JPS63164249U (ja) 1977-07-18 1987-05-18
JP3083041A Expired - Lifetime JPH0795564B2 (ja) 1977-07-18 1991-03-25 集積回路を製造する方法

Family Applications Before (1)

Application Number Title Priority Date Filing Date
JP8760778A Pending JPS5496383A (en) 1977-07-18 1978-07-18 High performance ic and method of fabricating same

Family Applications After (2)

Application Number Title Priority Date Filing Date
JP1987074267U Pending JPS63164249U (ja) 1977-07-18 1987-05-18
JP3083041A Expired - Lifetime JPH0795564B2 (ja) 1977-07-18 1991-03-25 集積回路を製造する方法

Country Status (6)

Country Link
US (1) US4135102A (ja)
JP (4) JPS5496383A (ja)
DE (1) DE2831522A1 (ja)
FR (1) FR2398388A1 (ja)
GB (1) GB2001197B (ja)
IT (1) IT1097846B (ja)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5443551A (en) * 1977-09-14 1979-04-06 Hitachi Ltd Monolithic semiconductor integrated circuit
US4417162A (en) * 1979-01-11 1983-11-22 Bell Telephone Laboratories, Incorporated Tri-state logic buffer circuit
WO1980001528A1 (en) * 1979-01-11 1980-07-24 Western Electric Co Tri-state logic buffer circuit
DE3016050C2 (de) * 1980-04-25 1985-08-29 Siemens AG, 1000 Berlin und 8000 München Verfahren zur Herstellung von Fotolackstrukturen für integrierte Halbleiterschaltungsanordnungen
JPS639885B2 (ja) * 1980-12-05 1988-03-02 Gni Pi Splavov Tsvet Metall
US4491748A (en) * 1981-04-16 1985-01-01 International Business Machines Corporation High performance FET driver circuit
US4409501A (en) * 1981-07-20 1983-10-11 Motorola Inc. Power-on reset circuit
IT1201859B (it) * 1986-12-10 1989-02-02 Sgs Microelettronica Spa Circuito logico cmos
JP2819302B2 (ja) * 1989-04-26 1998-10-30 富士通株式会社 半導体装置の製造方法
JPH02153574A (ja) * 1989-05-24 1990-06-13 Hitachi Ltd 半導体集積回路装置の製造法
JPH04211517A (ja) * 1990-03-19 1992-08-03 Toshiba Corp 電界効果トランジスタ回路
JP3361874B2 (ja) * 1994-02-28 2003-01-07 三菱電機株式会社 電界効果型半導体装置
JP2000124325A (ja) * 1998-10-16 2000-04-28 Nec Corp 半導体装置およびその製造方法
JP2007281027A (ja) * 2006-04-03 2007-10-25 Renesas Technology Corp 半導体装置とその製造方法
KR101539667B1 (ko) * 2008-06-18 2015-07-28 삼성전자주식회사 인버터 소자 및 그 동작 방법
CN103748752B (zh) * 2011-08-19 2017-12-08 马维尔国际贸易有限公司 启动电路
JP6713647B2 (ja) * 2016-05-10 2020-06-24 国立大学法人広島大学 炭化珪素半導体装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4979182A (ja) * 1972-12-04 1974-07-31

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5211199B1 (ja) * 1970-05-27 1977-03-29
JPS4860583A (ja) * 1971-11-26 1973-08-24
US3775693A (en) * 1971-11-29 1973-11-27 Moskek Co Mosfet logic inverter for integrated circuits
JPS5631744B2 (ja) * 1972-12-04 1981-07-23
US3851189A (en) * 1973-06-25 1974-11-26 Hughes Aircraft Co Bisitable digital circuitry
US3898105A (en) * 1973-10-25 1975-08-05 Mostek Corp Method for making FET circuits
DE2356446A1 (de) * 1973-11-12 1975-05-28 Licentia Gmbh Integrierte schaltung mit feldeffekttransistoren
US3868274A (en) * 1974-01-02 1975-02-25 Gen Instrument Corp Method for fabricating MOS devices with a multiplicity of thresholds on a semiconductor substrate
US3913026A (en) * 1974-04-08 1975-10-14 Bulova Watch Co Inc Mos transistor gain block
US3969633A (en) * 1975-01-08 1976-07-13 Mostek Corporation Self-biased trinary input circuit for MOSFET integrated circuit
JPS5198938A (ja) * 1975-02-26 1976-08-31
JPS51102581A (ja) * 1975-03-07 1976-09-10 Sanyo Electric Co
US3995172A (en) * 1975-06-05 1976-11-30 International Business Machines Corporation Enhancement-and depletion-type field effect transistors connected in parallel

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4979182A (ja) * 1972-12-04 1974-07-31

Also Published As

Publication number Publication date
US4135102A (en) 1979-01-16
JPS63164249U (ja) 1988-10-26
GB2001197B (en) 1982-05-26
JPS5496383A (en) 1979-07-30
JPH05267598A (ja) 1993-10-15
FR2398388A1 (fr) 1979-02-16
DE2831522C2 (ja) 1991-06-06
IT7825818A0 (it) 1978-07-17
DE2831522A1 (de) 1979-02-01
JPH0210678Y2 (ja) 1990-03-16
GB2001197A (en) 1979-01-24
IT1097846B (it) 1985-08-31
FR2398388B1 (ja) 1984-11-16
JPH0795564B2 (ja) 1995-10-11

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