JPS5771599A - Address error detection system - Google Patents
Address error detection systemInfo
- Publication number
- JPS5771599A JPS5771599A JP55147822A JP14782280A JPS5771599A JP S5771599 A JPS5771599 A JP S5771599A JP 55147822 A JP55147822 A JP 55147822A JP 14782280 A JP14782280 A JP 14782280A JP S5771599 A JPS5771599 A JP S5771599A
- Authority
- JP
- Japan
- Prior art keywords
- syndrome
- circuit
- data
- inputted
- generating circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Detection And Correction Of Errors (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
PURPOSE:To detect a fulat of address information without increasing the capacity of a storage device, by inputting an address parity bit to a check bit generating circuit and a syndrome generating circuit, respectively. CONSTITUTION:A write-in data and an address parity bit are inputted to a check bit generating circuit 4, and a check bit is generated from the circuit 4. The data and the check bit are written in a storage device 1. The data bit, the check bit and a parity bit of a readout address, which have been read out from the device 1 are inputted to a syndrome generating circuit 5. A generated syndrome is inputted to a syndrome generating circuit 5. A generated syndrome is inputted to a syndrome generating circuit 5. A generated syndrome is inputted to a syndrome decoding circuit 6, and in the circuit 6, an error is decided. In case of an error which can be corrected, a correction position instructing information is sent out to a data correction circuit 7 from the circuit 6, the circuit 7 corrects a data in accordance with this informatuon, and sends it out to a data line 11. In this way, it is decided by the syndrome pattern that the address line is faulty.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55147822A JPS5771599A (en) | 1980-10-22 | 1980-10-22 | Address error detection system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55147822A JPS5771599A (en) | 1980-10-22 | 1980-10-22 | Address error detection system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5771599A true JPS5771599A (en) | 1982-05-04 |
Family
ID=15439007
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55147822A Pending JPS5771599A (en) | 1980-10-22 | 1980-10-22 | Address error detection system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5771599A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6054059A (en) * | 1983-09-02 | 1985-03-28 | Hitachi Ltd | Storage device |
JPH03186954A (en) * | 1989-12-15 | 1991-08-14 | Fujitsu Ltd | Address error detection system |
JP2020194357A (en) * | 2019-05-28 | 2020-12-03 | 株式会社東芝 | Information processing circuit and information processing method |
-
1980
- 1980-10-22 JP JP55147822A patent/JPS5771599A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6054059A (en) * | 1983-09-02 | 1985-03-28 | Hitachi Ltd | Storage device |
JPH03186954A (en) * | 1989-12-15 | 1991-08-14 | Fujitsu Ltd | Address error detection system |
JP2020194357A (en) * | 2019-05-28 | 2020-12-03 | 株式会社東芝 | Information processing circuit and information processing method |
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