JPS5766598A - Memory circuit having error correction function - Google Patents

Memory circuit having error correction function

Info

Publication number
JPS5766598A
JPS5766598A JP55141331A JP14133180A JPS5766598A JP S5766598 A JPS5766598 A JP S5766598A JP 55141331 A JP55141331 A JP 55141331A JP 14133180 A JP14133180 A JP 14133180A JP S5766598 A JPS5766598 A JP S5766598A
Authority
JP
Japan
Prior art keywords
signal
circuit
generating circuit
parity
error
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55141331A
Other languages
Japanese (ja)
Other versions
JPS6223902B2 (en
Inventor
Hidehiko Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP55141331A priority Critical patent/JPS5766598A/en
Publication of JPS5766598A publication Critical patent/JPS5766598A/en
Publication of JPS6223902B2 publication Critical patent/JPS6223902B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Detection And Correction Of Errors (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE:To speed operation and to decrease the number of circuits by performing writing operation by supplying an error correction code generating circuit with parity generating circuit outputs equivalent to write data width for external write data. CONSTITUTION:In a data selecting circuit 2, a byte specified by a write address signal a'' among information bits (d) from a memory array 1 is substituted by external write data (n) to obtain a data output (i). A parity generating circuit 3 generates a write part parity signal (f) from the data (n) and outputs it to an error correction code generating circuit 5. In the circuit 5, a byte, specified by the signal a''. of a partial parity signal (e) inputted from a parity generating circuit 4 is substituted by the signal (f), thereby outputting a check bit (j) to an error correcting circuit 8. On receiving a signal (a), an address checking circuit 10 outputs an error position specification signal (k), obtained by correcting a decoded signal (h) so that even if a bit (d) has a one-bit error, the corrections of information bits and a corresponding check bit are inhibited, to error correcting circuits 7 and 8.
JP55141331A 1980-10-09 1980-10-09 Memory circuit having error correction function Granted JPS5766598A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55141331A JPS5766598A (en) 1980-10-09 1980-10-09 Memory circuit having error correction function

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55141331A JPS5766598A (en) 1980-10-09 1980-10-09 Memory circuit having error correction function

Publications (2)

Publication Number Publication Date
JPS5766598A true JPS5766598A (en) 1982-04-22
JPS6223902B2 JPS6223902B2 (en) 1987-05-26

Family

ID=15289455

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55141331A Granted JPS5766598A (en) 1980-10-09 1980-10-09 Memory circuit having error correction function

Country Status (1)

Country Link
JP (1) JPS5766598A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0526171Y2 (en) * 1987-12-22 1993-07-01
JPH01153007U (en) * 1988-04-14 1989-10-23
JPH06235228A (en) * 1993-02-09 1994-08-23 Kajima Corp Embedded vent cap

Also Published As

Publication number Publication date
JPS6223902B2 (en) 1987-05-26

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