JPS5744294A - Alternating memory control system - Google Patents

Alternating memory control system

Info

Publication number
JPS5744294A
JPS5744294A JP55118595A JP11859580A JPS5744294A JP S5744294 A JPS5744294 A JP S5744294A JP 55118595 A JP55118595 A JP 55118595A JP 11859580 A JP11859580 A JP 11859580A JP S5744294 A JPS5744294 A JP S5744294A
Authority
JP
Japan
Prior art keywords
memory
error
readout
data
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55118595A
Other languages
Japanese (ja)
Inventor
Yutaka Kamiyanagi
Ryuichi Usami
Shuji Ito
Toyoshi Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55118595A priority Critical patent/JPS5744294A/en
Publication of JPS5744294A publication Critical patent/JPS5744294A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring

Abstract

PURPOSE:To prevent the lowering of the information process efficiency, by carrying out the readout of an original memory after a replacing action according to the error and when the readout is carried out to the address and making effective the readout of an alternating memory only when the error is confirmed. CONSTITUTION:The write-in data given from an external device 15 is written in the 1st memory 2 of a memory part 1 and then read out through a read data selecting part 4 to be stored in a data register 10. This readout data receives an error checking based on the check bit, and the error is detected by an error detecting circuit 12. Thus checking result is reported to the device 15 via a syndrome decoder 14, and the corrected data is written in a memory 3. After this, the error address of an alteration control part 7 is compared with the address given from the device 15 at a comparator 5 for the readout of a memory part 1. Then the circuit 4 is controlled. The data from the memory 3 is made effective only when the circuit 12 detects an error in the information given from the memory 2. Accordingly the memory 3 having a low response speed is used only when necessary to prevent the lowering of the information process efficiency.
JP55118595A 1980-08-28 1980-08-28 Alternating memory control system Pending JPS5744294A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55118595A JPS5744294A (en) 1980-08-28 1980-08-28 Alternating memory control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55118595A JPS5744294A (en) 1980-08-28 1980-08-28 Alternating memory control system

Publications (1)

Publication Number Publication Date
JPS5744294A true JPS5744294A (en) 1982-03-12

Family

ID=14740463

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55118595A Pending JPS5744294A (en) 1980-08-28 1980-08-28 Alternating memory control system

Country Status (1)

Country Link
JP (1) JPS5744294A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59165161A (en) * 1983-03-11 1984-09-18 Ibm Volume restoration system of data set for word processing system
JPS6070897A (en) * 1983-09-27 1985-04-22 Nec Corp Spare constituting system of main storage device
JPS61146141A (en) * 1984-12-21 1986-07-03 Sadami Ito Production of edible container
JPS61149036A (en) * 1984-12-21 1986-07-07 Sadami Ito Production of edible container
JPS6478346A (en) * 1987-09-19 1989-03-23 Fujitsu Ltd Alternate memory control system
JPH0423055A (en) * 1990-05-17 1992-01-27 Fujitsu Ltd Alternate assignment control system

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59165161A (en) * 1983-03-11 1984-09-18 Ibm Volume restoration system of data set for word processing system
JPH0317141B2 (en) * 1983-03-11 1991-03-07 Intaanashonaru Bijinesu Mashiinzu Corp
JPS6070897A (en) * 1983-09-27 1985-04-22 Nec Corp Spare constituting system of main storage device
JPS61146141A (en) * 1984-12-21 1986-07-03 Sadami Ito Production of edible container
JPS61149036A (en) * 1984-12-21 1986-07-07 Sadami Ito Production of edible container
JPS6478346A (en) * 1987-09-19 1989-03-23 Fujitsu Ltd Alternate memory control system
JPH0423055A (en) * 1990-05-17 1992-01-27 Fujitsu Ltd Alternate assignment control system

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