JPS57203299A - Storage device - Google Patents
Storage deviceInfo
- Publication number
- JPS57203299A JPS57203299A JP56089002A JP8900281A JPS57203299A JP S57203299 A JPS57203299 A JP S57203299A JP 56089002 A JP56089002 A JP 56089002A JP 8900281 A JP8900281 A JP 8900281A JP S57203299 A JPS57203299 A JP S57203299A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- write data
- writing
- error
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
PURPOSE:To protect stored contents and reduce the generation of data deformation by providing the titled device with an error detecting circuit and, when an error is generated in a write data, inhibiting writing to a storage circuit. CONSTITUTION:At the time of writing, a write data selecting circuit 1 selects a write data from a CPU. An encoding circuit 2 generates a check bit by using the write data. In parallel with said processing, an error detecting circuit 9 performs parity check of each byte in accordance with a write data parity bit from the CPU and a write data from the circuit 1 both of which are selected by a parity selecting circuit 8 and, when an odd bit error is detected, generates an error detecting signal, which inhibits writing to a storage circuit 3. The same is applied also to partial writing. Thus, the stored contents are protected and data deformation is reduced by inhibiting the writing of error data.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56089002A JPS57203299A (en) | 1981-06-10 | 1981-06-10 | Storage device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56089002A JPS57203299A (en) | 1981-06-10 | 1981-06-10 | Storage device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57203299A true JPS57203299A (en) | 1982-12-13 |
JPS6232826B2 JPS6232826B2 (en) | 1987-07-16 |
Family
ID=13958597
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56089002A Granted JPS57203299A (en) | 1981-06-10 | 1981-06-10 | Storage device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57203299A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05225798A (en) * | 1991-08-14 | 1993-09-03 | Internatl Business Mach Corp <Ibm> | Memory system |
JPH06324951A (en) * | 1991-10-31 | 1994-11-25 | Internatl Business Mach Corp <Ibm> | Computer system with error inspection / correction function |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49128646A (en) * | 1973-04-09 | 1974-12-10 | ||
JPS5118443A (en) * | 1974-08-07 | 1976-02-14 | Hitachi Ltd | Deeta bitsutoeraateiseihoshiki |
JPS55135396A (en) * | 1979-04-05 | 1980-10-22 | Mitsubishi Electric Corp | Error correction/detection system of memory unit |
-
1981
- 1981-06-10 JP JP56089002A patent/JPS57203299A/en active Granted
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49128646A (en) * | 1973-04-09 | 1974-12-10 | ||
JPS5118443A (en) * | 1974-08-07 | 1976-02-14 | Hitachi Ltd | Deeta bitsutoeraateiseihoshiki |
JPS55135396A (en) * | 1979-04-05 | 1980-10-22 | Mitsubishi Electric Corp | Error correction/detection system of memory unit |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05225798A (en) * | 1991-08-14 | 1993-09-03 | Internatl Business Mach Corp <Ibm> | Memory system |
JPH06324951A (en) * | 1991-10-31 | 1994-11-25 | Internatl Business Mach Corp <Ibm> | Computer system with error inspection / correction function |
Also Published As
Publication number | Publication date |
---|---|
JPS6232826B2 (en) | 1987-07-16 |
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