JPS57147199A - Memory device - Google Patents
Memory deviceInfo
- Publication number
- JPS57147199A JPS57147199A JP56032515A JP3251581A JPS57147199A JP S57147199 A JPS57147199 A JP S57147199A JP 56032515 A JP56032515 A JP 56032515A JP 3251581 A JP3251581 A JP 3251581A JP S57147199 A JPS57147199 A JP S57147199A
- Authority
- JP
- Japan
- Prior art keywords
- error
- data rewriting
- bit
- data
- cpu
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Detection And Correction Of Errors (AREA)
Abstract
PURPOSE:To make an error detection signal unnecessary at data rewriting and prevent a CPU from loss of time due to a 2-bit error at data rewriting by detecting the 2-bit error generated at data rewriting in case of data readout. CONSTITUTION:When detecting a 2-bit error at data rewriting, an error detection/correction circuit 26 applies an error detection signal to a check bit generation circuit 27. When receiving the error detection signal 28, the check bit generation circuit 27 adds a check bit C1 indicating an uncorrectable error to a write data D3. In the schematic drawing, a CPU, a parity checker/generator and a selector circuit are represented by 1, 21 and 22 respectively. Thus, an interface for informing the 2-bit error detected at data rewriting to the CPU1 is made unnecessary and the CPU time loss due to the detection of the 2-bit error at every data rewriting is prevented.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56032515A JPS57147199A (en) | 1981-03-09 | 1981-03-09 | Memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56032515A JPS57147199A (en) | 1981-03-09 | 1981-03-09 | Memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57147199A true JPS57147199A (en) | 1982-09-10 |
Family
ID=12361102
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56032515A Pending JPS57147199A (en) | 1981-03-09 | 1981-03-09 | Memory device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57147199A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61267139A (en) * | 1985-05-21 | 1986-11-26 | Fujitsu Ltd | Memory control circuit |
JPS6310378A (en) * | 1986-07-01 | 1988-01-16 | Nec Corp | Peripheral memory device |
-
1981
- 1981-03-09 JP JP56032515A patent/JPS57147199A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61267139A (en) * | 1985-05-21 | 1986-11-26 | Fujitsu Ltd | Memory control circuit |
JPS6310378A (en) * | 1986-07-01 | 1988-01-16 | Nec Corp | Peripheral memory device |
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