JPS5637899A - Memory malfunction detection system - Google Patents

Memory malfunction detection system

Info

Publication number
JPS5637899A
JPS5637899A JP11389979A JP11389979A JPS5637899A JP S5637899 A JPS5637899 A JP S5637899A JP 11389979 A JP11389979 A JP 11389979A JP 11389979 A JP11389979 A JP 11389979A JP S5637899 A JPS5637899 A JP S5637899A
Authority
JP
Japan
Prior art keywords
signal
circuit
roma
parity
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11389979A
Other languages
Japanese (ja)
Other versions
JPS607822B2 (en
Inventor
Keiichi Hyodo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP54113899A priority Critical patent/JPS607822B2/en
Publication of JPS5637899A publication Critical patent/JPS5637899A/en
Publication of JPS607822B2 publication Critical patent/JPS607822B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Detection And Correction Of Errors (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE: To detect an error of an address selective matrix circuit by determining a parity bit in data write operation in connection with an address signal and by making a parity check in read operation in connection with the address signal.
CONSTITUTION: To exclusive-OR circuit 6, parity bit P2 added to address signal ROMA of ROM1 and parity bit P0 of data ROMDT written at an address part indicated by signal ROMA are transferred. Output signal P0 of circuit 6 obtained on the basis of those bits P0 and P2 and data signal RDT outputted from ROM1 on the basis of signal ROMA are supplied to check circuit 7 to make a parity check. Further, signal ROMA is checked in terms of parity by check circuit 3 with parity bit P2.
COPYRIGHT: (C)1981,JPO&Japio
JP54113899A 1979-09-04 1979-09-04 Memory malfunction detection method Expired JPS607822B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54113899A JPS607822B2 (en) 1979-09-04 1979-09-04 Memory malfunction detection method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54113899A JPS607822B2 (en) 1979-09-04 1979-09-04 Memory malfunction detection method

Publications (2)

Publication Number Publication Date
JPS5637899A true JPS5637899A (en) 1981-04-11
JPS607822B2 JPS607822B2 (en) 1985-02-27

Family

ID=14623935

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54113899A Expired JPS607822B2 (en) 1979-09-04 1979-09-04 Memory malfunction detection method

Country Status (1)

Country Link
JP (1) JPS607822B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61242822A (en) * 1985-04-22 1986-10-29 Mitsubishi Heavy Ind Ltd Two-axial extruding machine
JPH0225937A (en) * 1988-07-14 1990-01-29 Fujitsu Denso Ltd Detecting system for cpu runaway
JPH02100724A (en) * 1988-10-07 1990-04-12 Fujitsu Denso Ltd Runaway detection system for microcomputer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61242822A (en) * 1985-04-22 1986-10-29 Mitsubishi Heavy Ind Ltd Two-axial extruding machine
JPH0225937A (en) * 1988-07-14 1990-01-29 Fujitsu Denso Ltd Detecting system for cpu runaway
JPH02100724A (en) * 1988-10-07 1990-04-12 Fujitsu Denso Ltd Runaway detection system for microcomputer

Also Published As

Publication number Publication date
JPS607822B2 (en) 1985-02-27

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