JPS55115148A - Error detection and correction system - Google Patents

Error detection and correction system

Info

Publication number
JPS55115148A
JPS55115148A JP2173679A JP2173679A JPS55115148A JP S55115148 A JPS55115148 A JP S55115148A JP 2173679 A JP2173679 A JP 2173679A JP 2173679 A JP2173679 A JP 2173679A JP S55115148 A JPS55115148 A JP S55115148A
Authority
JP
Japan
Prior art keywords
bit
error
data
correction
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2173679A
Other languages
Japanese (ja)
Inventor
Suketaka Ishikawa
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2173679A priority Critical patent/JPS55115148A/en
Publication of JPS55115148A publication Critical patent/JPS55115148A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To increase the reliability of data, by detecting the state of error correctly to point out the error occurrence bit if a plurality of bit errors two or more bits.
CONSTITUTION: The output of the register 6 holding the readout data bit and redundan bit from the memory unit 4 is fed to the single bit error correction -double bit error detection SEC-DED circuit 8. Further, in case of detection and correction as n-bit error and in case of detection as n+1-bit error, the result is fed to the polarity inverter 13 via the logical sum gate 24 and the register 22, and the data bit and the redundant bit are all polarity inverted and written in the unit 4 again. The data and redundant bit written in are read out on the register 6, they are compared with the data bit and redundant bit before polarity inversion at the error bit indicating circuit 25, to point out up the error occurrence of n-bit and n+1-bit or more.
COPYRIGHT: (C)1980,JPO&Japio
JP2173679A 1979-02-26 1979-02-26 Error detection and correction system Pending JPS55115148A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2173679A JPS55115148A (en) 1979-02-26 1979-02-26 Error detection and correction system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2173679A JPS55115148A (en) 1979-02-26 1979-02-26 Error detection and correction system

Publications (1)

Publication Number Publication Date
JPS55115148A true JPS55115148A (en) 1980-09-04

Family

ID=12063355

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2173679A Pending JPS55115148A (en) 1979-02-26 1979-02-26 Error detection and correction system

Country Status (1)

Country Link
JP (1) JPS55115148A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01304543A (en) * 1988-04-29 1989-12-08 Internatl Business Mach Corp <Ibm> Error correction circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01304543A (en) * 1988-04-29 1989-12-08 Internatl Business Mach Corp <Ibm> Error correction circuit
JPH0529935B2 (en) * 1988-04-29 1993-05-06 Intaanashonaru Bijinesu Mashiinzu Corp

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