JPS6438852A - Memory device - Google Patents

Memory device

Info

Publication number
JPS6438852A
JPS6438852A JP62195880A JP19588087A JPS6438852A JP S6438852 A JPS6438852 A JP S6438852A JP 62195880 A JP62195880 A JP 62195880A JP 19588087 A JP19588087 A JP 19588087A JP S6438852 A JPS6438852 A JP S6438852A
Authority
JP
Japan
Prior art keywords
information
memory
circuit
line
main memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62195880A
Other languages
Japanese (ja)
Inventor
Chikara Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62195880A priority Critical patent/JPS6438852A/en
Publication of JPS6438852A publication Critical patent/JPS6438852A/en
Pending legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

PURPOSE:To restore uncorrectable data to correctable data even when the uncorrectable data are detected by using an alternative memory circuit when abnormality occurs in a main memory circuit. CONSTITUTION:When the abnormality occurs in main memory circuits 1-5, an error correcting detecting circuit detects which memory of the main memory circuits 1-5 is abnormal. When the abnormality occurs at a memory 1, an input switching circuit 8 writes the information of a writing information line 110 into an alternative memory 6 based on the information from an output switching line 101. At the time of reading, based on the information of the output switching line 101, a switching circuit 9 reads out the information of the memory circuit 6 to a reading information line 120. The information from the main memory circuits 2-5 is read out to other reading information lines 121-124.
JP62195880A 1987-08-05 1987-08-05 Memory device Pending JPS6438852A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62195880A JPS6438852A (en) 1987-08-05 1987-08-05 Memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62195880A JPS6438852A (en) 1987-08-05 1987-08-05 Memory device

Publications (1)

Publication Number Publication Date
JPS6438852A true JPS6438852A (en) 1989-02-09

Family

ID=16348524

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62195880A Pending JPS6438852A (en) 1987-08-05 1987-08-05 Memory device

Country Status (1)

Country Link
JP (1) JPS6438852A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0498342A (en) * 1990-08-09 1992-03-31 Mitsubishi Electric Corp Semiconductor memory device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0498342A (en) * 1990-08-09 1992-03-31 Mitsubishi Electric Corp Semiconductor memory device

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