JPS5766515A - Memory address control system - Google Patents

Memory address control system

Info

Publication number
JPS5766515A
JPS5766515A JP55142755A JP14275580A JPS5766515A JP S5766515 A JPS5766515 A JP S5766515A JP 55142755 A JP55142755 A JP 55142755A JP 14275580 A JP14275580 A JP 14275580A JP S5766515 A JPS5766515 A JP S5766515A
Authority
JP
Japan
Prior art keywords
signal
sound
underflow
data
alternant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55142755A
Other languages
English (en)
Other versions
JPS628858B2 (ja
Inventor
Chitoshi Hibino
Harukuni Kohari
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Nippon Victor KK
Original Assignee
Victor Company of Japan Ltd
Nippon Victor KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd, Nippon Victor KK filed Critical Victor Company of Japan Ltd
Priority to JP55142755A priority Critical patent/JPS5766515A/ja
Priority to GB8130756A priority patent/GB2088103B/en
Priority to DE19813140683 priority patent/DE3140683C2/de
Priority to FR8119562A priority patent/FR2492149A1/fr
Publication of JPS5766515A publication Critical patent/JPS5766515A/ja
Publication of JPS628858B2 publication Critical patent/JPS628858B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/00007—Time or data compression or expansion
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/10527—Audio or video recording; Data buffering arrangements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/22—Signal processing not specific to the method of recording or reproducing; Circuits therefor for reducing distortions
    • G11B20/225—Signal processing not specific to the method of recording or reproducing; Circuits therefor for reducing distortions for reducing wow or flutter
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/10527—Audio or video recording; Data buffering arrangements
    • G11B2020/1062—Data buffering arrangements, e.g. recording or playback buffers
    • G11B2020/10675—Data buffering arrangements, e.g. recording or playback buffers aspects of buffer control
    • G11B2020/10694—Data buffering arrangements, e.g. recording or playback buffers aspects of buffer control output interface, i.e. the way data leave the buffer, e.g. by adjusting the clock rate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/10527—Audio or video recording; Data buffering arrangements
    • G11B2020/1062—Data buffering arrangements, e.g. recording or playback buffers
    • G11B2020/10675—Data buffering arrangements, e.g. recording or playback buffers aspects of buffer control
    • G11B2020/10703—Data buffering arrangements, e.g. recording or playback buffers aspects of buffer control processing rate of the buffer, e.g. by accelerating the data output
JP55142755A 1980-10-13 1980-10-13 Memory address control system Granted JPS5766515A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP55142755A JPS5766515A (en) 1980-10-13 1980-10-13 Memory address control system
GB8130756A GB2088103B (en) 1980-10-13 1981-10-12 Memory control circuit
DE19813140683 DE3140683C2 (de) 1980-10-13 1981-10-13 Zeitdehnungsschaltkreis für Wiedergabesysteme
FR8119562A FR2492149A1 (fr) 1980-10-13 1981-10-13 Circuit de commande d'une memoire

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55142755A JPS5766515A (en) 1980-10-13 1980-10-13 Memory address control system

Publications (2)

Publication Number Publication Date
JPS5766515A true JPS5766515A (en) 1982-04-22
JPS628858B2 JPS628858B2 (ja) 1987-02-25

Family

ID=15322816

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55142755A Granted JPS5766515A (en) 1980-10-13 1980-10-13 Memory address control system

Country Status (4)

Country Link
JP (1) JPS5766515A (ja)
DE (1) DE3140683C2 (ja)
FR (1) FR2492149A1 (ja)
GB (1) GB2088103B (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60203094A (ja) * 1983-12-14 1985-10-14 テレフンケン・フエルンゼ−・ウント・ルントフンク・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツング ビデオ信号を時間圧縮または時間伸長する回路装置
JPS61188783A (ja) * 1985-02-11 1986-08-22 アムペックス　コーポレーシヨン メモリ制御回路
JPH0352471A (ja) * 1989-07-20 1991-03-06 Matsushita Electric Ind Co Ltd 映像用特殊再生装置
EP0577216A1 (en) * 1992-07-01 1994-01-05 Ampex Systems Corporation Time delay control for serial digital video interface audio receiver buffer

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58205906A (ja) * 1982-05-26 1983-12-01 Victor Co Of Japan Ltd メモリ回路への書き込み方式
JPS60111556U (ja) * 1983-12-29 1985-07-29 パイオニア株式会社 情報再生装置
US4675749A (en) * 1984-03-16 1987-06-23 Pioneer Electronic Corporation Disc player system with digital information demodulation operation
JPH0673225B2 (ja) * 1984-11-06 1994-09-14 株式会社日立製作所 デイジタル情報再生装置における時間軸補正装置
JPH084340B2 (ja) * 1985-08-07 1996-01-17 セイコーエプソン株式会社 インタ−フエイス装置
US5179692A (en) * 1985-08-07 1993-01-12 Seiko Epson Corporation Emulation device for driving a LCD with signals formatted for a CRT display
US4860246A (en) * 1985-08-07 1989-08-22 Seiko Epson Corporation Emulation device for driving a LCD with a CRT display
NL191249C (nl) * 1985-09-12 1995-04-03 Pioneer Electronic Corp Stelsel voor het weergeven van digitale informatie, die is geregistreerd op een registratieplaat.
GB2199469A (en) * 1986-12-23 1988-07-06 Philips Electronic Associated Clock signal generator
GB2203616B (en) * 1987-04-01 1991-10-02 Digital Equipment Int Improvements in or relating to data communication systems
GB2229067A (en) * 1989-02-02 1990-09-12 Motorola Canada Ltd Retiming buffer for connecting binary data channels
GB2231981A (en) * 1989-04-27 1990-11-28 Stc Plc Memory read/write arrangement
SG42830A1 (en) * 1993-08-14 1997-10-17 Toshiba Kk Disc data reproducing apparatus and signal processing circuit

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3836891A (en) * 1973-07-05 1974-09-17 Bendix Corp Tape reader system with buffer memory
US4054921A (en) * 1975-05-19 1977-10-18 Sony Corporation Automatic time-base error correction system
JPS6052499B2 (ja) * 1976-02-24 1985-11-19 ソニー株式会社 メモリ−装置
DE2639895C2 (de) * 1976-09-04 1983-06-16 Nixdorf Computer Ag, 4790 Paderborn Verfahren zur Übertragung von Informationssignalen aus einem Informationsspeicher in einem Datenkanal in Datenverarbeitungsanlagen und Einrichtung zur Durchführung des Verfahrens
FR2383563A1 (fr) * 1977-03-11 1978-10-06 Sony Corp Procede et appareil d'enregistrement de signaux audiofrequences avec un enregistreur video

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60203094A (ja) * 1983-12-14 1985-10-14 テレフンケン・フエルンゼ−・ウント・ルントフンク・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツング ビデオ信号を時間圧縮または時間伸長する回路装置
JPS61188783A (ja) * 1985-02-11 1986-08-22 アムペックス　コーポレーシヨン メモリ制御回路
JPH0352471A (ja) * 1989-07-20 1991-03-06 Matsushita Electric Ind Co Ltd 映像用特殊再生装置
EP0577216A1 (en) * 1992-07-01 1994-01-05 Ampex Systems Corporation Time delay control for serial digital video interface audio receiver buffer
US5323272A (en) * 1992-07-01 1994-06-21 Ampex Systems Corporation Time delay control for serial digital video interface audio receiver buffer

Also Published As

Publication number Publication date
DE3140683A1 (de) 1982-05-27
GB2088103A (en) 1982-06-03
FR2492149B1 (ja) 1984-12-14
FR2492149A1 (fr) 1982-04-16
DE3140683C2 (de) 1984-07-26
GB2088103B (en) 1985-07-31
JPS628858B2 (ja) 1987-02-25

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