JPS5715447A - Production of substrate for carrying components - Google Patents

Production of substrate for carrying components

Info

Publication number
JPS5715447A
JPS5715447A JP9012980A JP9012980A JPS5715447A JP S5715447 A JPS5715447 A JP S5715447A JP 9012980 A JP9012980 A JP 9012980A JP 9012980 A JP9012980 A JP 9012980A JP S5715447 A JPS5715447 A JP S5715447A
Authority
JP
Japan
Prior art keywords
substrate
wiring pattern
sheet
hole
mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9012980A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6359535B2 (en, 2012
Inventor
Yuji Matsuda
Masaru Iwasaki
Yuichi Yoshida
Takashi Nukui
Shigeo Nakatake
Katsuteru Awane
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP9012980A priority Critical patent/JPS5715447A/ja
Priority to US06/277,807 priority patent/US4544989A/en
Priority to DE3125518A priority patent/DE3125518C2/de
Priority to FR8112887A priority patent/FR2485866B1/fr
Publication of JPS5715447A publication Critical patent/JPS5715447A/ja
Publication of JPS6359535B2 publication Critical patent/JPS6359535B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09036—Recesses or grooves in insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/096—Vertically aligned vias, holes or stacked vias

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
JP9012980A 1980-06-30 1980-06-30 Production of substrate for carrying components Granted JPS5715447A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP9012980A JPS5715447A (en) 1980-06-30 1980-06-30 Production of substrate for carrying components
US06/277,807 US4544989A (en) 1980-06-30 1981-06-26 Thin assembly for wiring substrate
DE3125518A DE3125518C2 (de) 1980-06-30 1981-06-29 Verfahren zur Herstellung einer dünnen Verdrahtungsanordnung
FR8112887A FR2485866B1 (fr) 1980-06-30 1981-06-30 Substrat de cablage mince

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9012980A JPS5715447A (en) 1980-06-30 1980-06-30 Production of substrate for carrying components

Publications (2)

Publication Number Publication Date
JPS5715447A true JPS5715447A (en) 1982-01-26
JPS6359535B2 JPS6359535B2 (en, 2012) 1988-11-21

Family

ID=13989893

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9012980A Granted JPS5715447A (en) 1980-06-30 1980-06-30 Production of substrate for carrying components

Country Status (1)

Country Link
JP (1) JPS5715447A (en, 2012)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61287128A (ja) * 1985-06-13 1986-12-17 Matsushita Electric Works Ltd 電子素子用チツプキヤリア
JPS61287129A (ja) * 1985-06-13 1986-12-17 Matsushita Electric Works Ltd 電子素子用チツプキヤリア
JPS6215882A (ja) * 1985-07-12 1987-01-24 松下電工株式会社 電子素子用チツプキヤリア
JPS63311746A (ja) * 1987-06-15 1988-12-20 Mitsubishi Gas Chem Co Inc Ｉｃチップ搭載用多層板の製造法
JPH06173106A (ja) * 1992-02-10 1994-06-21 Kanebo Ltd かつら及びかつらの製造方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3032071U (ja) * 1996-06-05 1996-12-13 スケーター株式会社 多目的な化粧用品収納テーブル

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5028272A (en, 2012) * 1973-07-11 1975-03-22

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5028272A (en, 2012) * 1973-07-11 1975-03-22

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61287128A (ja) * 1985-06-13 1986-12-17 Matsushita Electric Works Ltd 電子素子用チツプキヤリア
JPS61287129A (ja) * 1985-06-13 1986-12-17 Matsushita Electric Works Ltd 電子素子用チツプキヤリア
JPS6215882A (ja) * 1985-07-12 1987-01-24 松下電工株式会社 電子素子用チツプキヤリア
JPS63311746A (ja) * 1987-06-15 1988-12-20 Mitsubishi Gas Chem Co Inc Ｉｃチップ搭載用多層板の製造法
JPH06173106A (ja) * 1992-02-10 1994-06-21 Kanebo Ltd かつら及びかつらの製造方法

Also Published As

Publication number Publication date
JPS6359535B2 (en, 2012) 1988-11-21

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