JPS5785247A - Formation of fetch electrode - Google Patents

Formation of fetch electrode

Info

Publication number
JPS5785247A
JPS5785247A JP55161678A JP16167880A JPS5785247A JP S5785247 A JPS5785247 A JP S5785247A JP 55161678 A JP55161678 A JP 55161678A JP 16167880 A JP16167880 A JP 16167880A JP S5785247 A JPS5785247 A JP S5785247A
Authority
JP
Japan
Prior art keywords
bump
monitor
metal
gold
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55161678A
Other languages
Japanese (ja)
Inventor
Kunio Toda
Kazuo Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55161678A priority Critical patent/JPS5785247A/en
Publication of JPS5785247A publication Critical patent/JPS5785247A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01011Sodium [Na]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To improve the adhesive strength of bump by forming the bump of a predetermined pattern and a monitor bump on a metal adhering a gold bump forming a fetch electrode. CONSTITUTION:An insulating layer 12 is formed on the surface of a substrate 11 formed an internal wire 10 and a window 12a for providing with a gold bump 15 and a window 12b for providing with a monitor bump 14 are formed at the layer 12. Next, an adhesive metal 13 consisting of copper is formed on the surface of the layer 12, and a resist film 18 having contact holes 18a, 18b is formed on the surface of the metal 13. After that, the gold bump 15 and the monitor bump 14 are formed at the contact holes 18a, 18b and etching is applied to the metal 13 by removing the film 18 and using the bump 15 as a mask. And the base area of the monitor bump 14 is made with the value reducing the side etching amount from the base area of the gold bump 15 and the adhesion of the gold bump is guaranteed if the monitor bump is left after etching.
JP55161678A 1980-11-17 1980-11-17 Formation of fetch electrode Pending JPS5785247A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55161678A JPS5785247A (en) 1980-11-17 1980-11-17 Formation of fetch electrode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55161678A JPS5785247A (en) 1980-11-17 1980-11-17 Formation of fetch electrode

Publications (1)

Publication Number Publication Date
JPS5785247A true JPS5785247A (en) 1982-05-27

Family

ID=15739754

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55161678A Pending JPS5785247A (en) 1980-11-17 1980-11-17 Formation of fetch electrode

Country Status (1)

Country Link
JP (1) JPS5785247A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5246880A (en) * 1992-04-27 1993-09-21 Eastman Kodak Company Method for creating substrate electrodes for flip chip and other applications
US6100950A (en) * 1997-01-28 2000-08-08 Nec Corporation Active matrix LCD with thin film transistor switches and method of producing the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5246880A (en) * 1992-04-27 1993-09-21 Eastman Kodak Company Method for creating substrate electrodes for flip chip and other applications
US6100950A (en) * 1997-01-28 2000-08-08 Nec Corporation Active matrix LCD with thin film transistor switches and method of producing the same

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