JPS5473560A - Electrode forming method of semiconductor device - Google Patents

Electrode forming method of semiconductor device

Info

Publication number
JPS5473560A
JPS5473560A JP14001277A JP14001277A JPS5473560A JP S5473560 A JPS5473560 A JP S5473560A JP 14001277 A JP14001277 A JP 14001277A JP 14001277 A JP14001277 A JP 14001277A JP S5473560 A JPS5473560 A JP S5473560A
Authority
JP
Japan
Prior art keywords
layer
electrode layer
base metal
bump electrode
plating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14001277A
Other languages
Japanese (ja)
Inventor
Toru Kawanobe
Keiji Miyamoto
Hiroshi Kato
Yasukazu Shibazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP14001277A priority Critical patent/JPS5473560A/en
Publication of JPS5473560A publication Critical patent/JPS5473560A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • ing And Chemical Polishing (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)

Abstract

PURPOSE: To prohibit occurrence of side etching phenomenon by suppressing the cathode reaction, by performing chemical etching using the bump electrode layer as the mask, and plating the surface of the bump electrode layer with metal such as Sn, Pb and Zn when removing the base metal layer.
CONSTITUTION: A base SiO2 film 12 is deposited on Si substrate 10, and Al wire layer 14 of a specified pattern is formed thereon, and the contact part of wire layer 14 is coated with PSG passivation film 16 having windows. Next, a base metal layer consisting of Cr layer 18 and Cu layer 20 is laminated on the entire surface and evaporated, and Au bump electrode layer 22 is composed thereon. After this, excess base metal layers 18 and 20 are removed by etching, using the electrode layer 22 as the mask. At this time, a cathode reaction suppressive layer 24 of Sn, Pb, Zn or the like is deposited on the surface and sides of the electrode layer 20 by plating. Finally, the Cu layer 20 is etched in aqueous solution of ferric chloride, and the Cr layer 18 in aqueous solution of ammonium cerium (II) nitrate or others.
COPYRIGHT: (C)1979,JPO&Japio
JP14001277A 1977-11-24 1977-11-24 Electrode forming method of semiconductor device Pending JPS5473560A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14001277A JPS5473560A (en) 1977-11-24 1977-11-24 Electrode forming method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14001277A JPS5473560A (en) 1977-11-24 1977-11-24 Electrode forming method of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5473560A true JPS5473560A (en) 1979-06-12

Family

ID=15258872

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14001277A Pending JPS5473560A (en) 1977-11-24 1977-11-24 Electrode forming method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5473560A (en)

Similar Documents

Publication Publication Date Title
FR2097133B1 (en)
JPS5773952A (en) Chip for face down bonding and production thereof
JPS5473560A (en) Electrode forming method of semiconductor device
JPS5487471A (en) Manufacture of semiconductor device
JPS5785247A (en) Formation of fetch electrode
JPS57159043A (en) Forming method for electrode wire of semiconductor device
JPS57139944A (en) Forming method for solder bump electrode
JPS5460557A (en) Solder electrode forming method
JPS54162458A (en) Manufacture for semiconductor device
JPS54121669A (en) Manufacture of semiconductor element
JPS5521106A (en) Method of forming ohmic electrode
JPS5815254A (en) Manufacture of semiconductor element
JPS5488076A (en) Manufacture for semiconductor device
JPS5447475A (en) Electrode forming method of semiconductor devices
JPS57139945A (en) Forming method for solder bump electrode
JPS5575244A (en) Method of fabricating semiconductor device
JPS56105653A (en) Gold bump forming method of semiconductor device
JPS6412554A (en) Manufacture of semiconductor device
JPS5488074A (en) Manufacture for semiconductor device
JPS57126149A (en) Manufacture of semiconductor device
JPS55110790A (en) Method for surface treatment of nickel layer
JPS5915181B2 (en) Manufacturing method of semiconductor device
JPS5285469A (en) Solder connecting electrode in semiconductor devices
JPS5739560A (en) Mounting method for semiconductor element
JPS54113246A (en) Solder bump electrode structure