JPS57133655A - Lead frame - Google Patents

Lead frame

Info

Publication number
JPS57133655A
JPS57133655A JP1867681A JP1867681A JPS57133655A JP S57133655 A JPS57133655 A JP S57133655A JP 1867681 A JP1867681 A JP 1867681A JP 1867681 A JP1867681 A JP 1867681A JP S57133655 A JPS57133655 A JP S57133655A
Authority
JP
Japan
Prior art keywords
section
chip
sections
lead frame
easily deformed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1867681A
Other languages
English (en)
Inventor
Masamichi Manabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Corp
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Corp, Pioneer Electronic Corp filed Critical Pioneer Corp
Priority to JP1867681A priority Critical patent/JPS57133655A/ja
Priority to US06/347,611 priority patent/US4797726A/en
Publication of JPS57133655A publication Critical patent/JPS57133655A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49544—Deformation absorbing parts in the lead frame plane, e.g. meanderline shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05553—Shape in top view being rectangular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/4501—Shape
    • H01L2224/45012—Cross-sectional shape
    • H01L2224/45014—Ribbon connectors, e.g. rectangular cross-section
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Die Bonding (AREA)
JP1867681A 1981-02-10 1981-02-10 Lead frame Pending JPS57133655A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP1867681A JPS57133655A (en) 1981-02-10 1981-02-10 Lead frame
US06/347,611 US4797726A (en) 1981-02-10 1982-02-10 Lead frame including deformable plates

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1867681A JPS57133655A (en) 1981-02-10 1981-02-10 Lead frame

Publications (1)

Publication Number Publication Date
JPS57133655A true JPS57133655A (en) 1982-08-18

Family

ID=11978203

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1867681A Pending JPS57133655A (en) 1981-02-10 1981-02-10 Lead frame

Country Status (2)

Country Link
US (1) US4797726A (ja)
JP (1) JPS57133655A (ja)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6072236A (ja) * 1983-09-28 1985-04-24 Toshiba Corp 半導体装置
JPS60133736A (ja) * 1983-12-21 1985-07-16 Fujitsu Ltd 半導体装置
JPS6184841A (ja) * 1984-10-02 1986-04-30 Toshiba Corp 半導体装置の外囲器
JPS62136056A (ja) * 1985-12-09 1987-06-19 Nec Corp リ−ドフレ−ム
US5138428A (en) * 1989-05-31 1992-08-11 Siemens Aktiengesellschaft Connection of a semiconductor component to a metal carrier
JP2019536276A (ja) * 2016-11-11 2019-12-12 ルミレッズ ホールディング ベーフェー リードフレーム製造方法

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4942452A (en) * 1987-02-25 1990-07-17 Hitachi, Ltd. Lead frame and semiconductor device
USRE37690E1 (en) * 1987-02-25 2002-05-07 Hitachi, Ltd. Lead frame and semiconductor device
US5150193A (en) * 1987-05-27 1992-09-22 Hitachi, Ltd. Resin-encapsulated semiconductor device having a particular mounting structure
US4994895A (en) * 1988-07-11 1991-02-19 Fujitsu Limited Hybrid integrated circuit package structure
JP2602076B2 (ja) * 1988-09-08 1997-04-23 三菱電機株式会社 半導体装置用リードフレーム
DE3905657A1 (de) * 1989-02-24 1990-08-30 Telefunken Electronic Gmbh Flexible traegerfolie
US5021864A (en) * 1989-09-05 1991-06-04 Micron Technology, Inc. Die-mounting paddle for mechanical stress reduction in plastic IC packages
JPH03205857A (ja) * 1990-01-06 1991-09-09 Fujitsu Ltd 樹脂封止型電子部品
US5264730A (en) * 1990-01-06 1993-11-23 Fujitsu Limited Resin mold package structure of integrated circuit
US5218229A (en) * 1991-08-30 1993-06-08 Micron Technology, Inc. Inset die lead frame configuration lead frame for a semiconductor device having means for improved busing and die-lead frame attachment
US5233222A (en) * 1992-07-27 1993-08-03 Motorola, Inc. Semiconductor device having window-frame flag with tapered edge in opening
JP3420827B2 (ja) * 1994-04-28 2003-06-30 ローム株式会社 半導体集積回路装置の製造方法及びリードフレーム
US5661336A (en) * 1994-05-03 1997-08-26 Phelps, Jr.; Douglas Wallace Tape application platform and processes therefor
JPH0878605A (ja) * 1994-09-01 1996-03-22 Hitachi Ltd リードフレームおよびそれを用いた半導体集積回路装置
US5545921A (en) * 1994-11-04 1996-08-13 International Business Machines, Corporation Personalized area leadframe coining or half etching for reduced mechanical stress at device edge
JP2611748B2 (ja) * 1995-01-25 1997-05-21 日本電気株式会社 樹脂封止型半導体装置
JP3384901B2 (ja) * 1995-02-02 2003-03-10 三菱電機株式会社 リードフレーム
DE19506958C2 (de) * 1995-02-28 1998-09-24 Siemens Ag Halbleitervorrichtung mit gutem thermischen Verhalten
JPH09153586A (ja) * 1995-12-01 1997-06-10 Texas Instr Japan Ltd 半導体装置、その製造方法、及びリードフレーム
DE19717780A1 (de) * 1996-05-01 1997-11-13 Nat Semiconductor Corp Leiterrahmen für eine Halbleiterkomponente
US5932924A (en) * 1998-02-02 1999-08-03 Motorola, Inc. Leadframe having continuously reducing width and semiconductor device including such a leadframe
JPH11307713A (ja) * 1998-04-24 1999-11-05 Sony Corp 半導体装置用リードフレーム
JP2000058735A (ja) * 1998-08-07 2000-02-25 Hitachi Ltd リードフレーム、半導体装置及び半導体装置の製造方法
US7174626B2 (en) * 1999-06-30 2007-02-13 Intersil Americas, Inc. Method of manufacturing a plated electronic termination
US6853178B2 (en) * 2000-06-19 2005-02-08 Texas Instruments Incorporated Integrated circuit leadframes patterned for measuring the accurate amplitude of changing currents
JP4801243B2 (ja) * 2000-08-08 2011-10-26 ルネサスエレクトロニクス株式会社 リードフレームおよびそれを用いて製造した半導体装置並びにその製造方法
US20020070436A1 (en) * 2000-12-11 2002-06-13 Hui Chong Chin Die pad for integrated circuits
US7034382B2 (en) * 2001-04-16 2006-04-25 M/A-Com, Inc. Leadframe-based chip scale package
US6709977B2 (en) * 2002-02-12 2004-03-23 Broadcom Corporation Integrated circuit having oversized components and method of manafacture thereof
JP2005150456A (ja) * 2003-11-17 2005-06-09 Oki Electric Ind Co Ltd 半導体装置及びその製造方法
US9905515B2 (en) * 2014-08-08 2018-02-27 Mediatek Inc. Integrated circuit stress releasing structure
CN107845575A (zh) * 2017-11-03 2018-03-27 浙江人和光伏科技有限公司 一种薄片二极管的生产方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS497861B1 (ja) * 1969-05-16 1974-02-22
JPS5332672A (en) * 1976-09-07 1978-03-28 Matsushita Electronics Corp Lead frame for semiconductor device
JPS554983A (en) * 1978-06-27 1980-01-14 Nec Kyushu Ltd Lead frame for semiconductor device

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1907075B2 (de) * 1969-02-13 1974-07-04 Semikron Gesellschaft Fuer Gleichrichterbau Und Elektronik Mbh, 8500 Nuernberg Verfahren zur Herstellung von Halbleiter-Kleingleichrichtern
US4048438A (en) * 1974-10-23 1977-09-13 Amp Incorporated Conductor patterned substrate providing stress release during direct attachment of integrated circuit chips
US4109269A (en) * 1976-12-27 1978-08-22 National Semiconductor Corporation Opto-coupler semiconductor device
JPS5479563A (en) * 1977-12-07 1979-06-25 Kyushu Nippon Electric Lead frame for semiconductor
JPS55113349A (en) * 1979-02-23 1980-09-01 Hitachi Ltd Semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS497861B1 (ja) * 1969-05-16 1974-02-22
JPS5332672A (en) * 1976-09-07 1978-03-28 Matsushita Electronics Corp Lead frame for semiconductor device
JPS554983A (en) * 1978-06-27 1980-01-14 Nec Kyushu Ltd Lead frame for semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6072236A (ja) * 1983-09-28 1985-04-24 Toshiba Corp 半導体装置
JPS60133736A (ja) * 1983-12-21 1985-07-16 Fujitsu Ltd 半導体装置
JPS6184841A (ja) * 1984-10-02 1986-04-30 Toshiba Corp 半導体装置の外囲器
JPS62136056A (ja) * 1985-12-09 1987-06-19 Nec Corp リ−ドフレ−ム
US5138428A (en) * 1989-05-31 1992-08-11 Siemens Aktiengesellschaft Connection of a semiconductor component to a metal carrier
JP2019536276A (ja) * 2016-11-11 2019-12-12 ルミレッズ ホールディング ベーフェー リードフレーム製造方法

Also Published As

Publication number Publication date
US4797726A (en) 1989-01-10

Similar Documents

Publication Publication Date Title
JPS57133655A (en) Lead frame
MY120823A (en) Improved microlens and photodetector
AU5617386A (en) Solar module
ES482053A1 (es) Un aparato de intercambio de calor.
JPS5728337A (en) Connecting constructin of semiconductor element
FR2435568B1 (ja)
ES2016881A6 (es) Elementos de montaje de superficies para la construccion de moldes de inyeccion de hormigon.
SE8801198D0 (sv) Brensleaggregat
TW369711B (en) Method of manufacturing a semiconductor device with a pair of radiating terminals and a plurality of lead terminals formed from a single lead frame
ES232959U (es) Rejilla metalica para suelo.
ES2077849T3 (es) Placa de soporte y procedimiento para su fabricacion.
JPS6463885A (en) Assembling of radiation detector
SE434919B (sv) Anordning for fasthallning av krossmanteln i konkrossar
JPS5441742A (en) Heat recording elements
JPS5519875A (en) Jig diffusing operation
ES286431U (es) Un quemador de gas atmosferico
JPS57102029A (en) Manufacture of semiconductor device
GB1473816A (en) Fastening bracket
JPS6477843A (en) Shadow mask composition
JPS57164816A (en) Mounting structure of meter hood
JPS6442206A (en) Release of concrete form
WO2002097880A3 (de) Leistungsalbleitermodul und verfahren zum herstellen eines leistungshalbleitermoduls
GB1361304A (en) Distance pieces for semiconductor components
JPS5452263A (en) Method of installing long-sized member
JPS5541279A (en) Resin enclosing device