JPS57102029A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57102029A
JPS57102029A JP17725680A JP17725680A JPS57102029A JP S57102029 A JPS57102029 A JP S57102029A JP 17725680 A JP17725680 A JP 17725680A JP 17725680 A JP17725680 A JP 17725680A JP S57102029 A JPS57102029 A JP S57102029A
Authority
JP
Japan
Prior art keywords
electrode material
weight
semiconductor substrate
alloy
divided
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17725680A
Other languages
Japanese (ja)
Other versions
JPS6035823B2 (en
Inventor
Katsumi Akabane
Kougo Otai
Tadashi Sakagami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP17725680A priority Critical patent/JPS6035823B2/en
Publication of JPS57102029A publication Critical patent/JPS57102029A/en
Publication of JPS6035823B2 publication Critical patent/JPS6035823B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Lining Or Joining Of Plastics Or The Like (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To obtain sufficient alloy adhesion even if soldered surfaces are convex or concave when a semiconductor substrate and an electrode material are soldered, by a method wherein distributed weight is applied to the surface of the substrate opposite to the surface facing the electrode material. CONSTITUTION:Weight 4 is divided into a plurality of polygonal columns or cylindrical columns. By dividing the weight 4, each part of the main surface of a semiconductor substrate 1 is loaded by each of the divided weight 4. By this distributed load, the semiconductor substrate 1 is deformed following the concave shape of the alloy surface of the electrode material 3. With above configuration, even if the alloy surface of the electrode material has a concave shape, necessary load can be applied to the central part of the alloy surface, so that sufficient adhesion without any gap can be obtained.
JP17725680A 1980-12-17 1980-12-17 Manufacturing method for semiconductor devices Expired JPS6035823B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17725680A JPS6035823B2 (en) 1980-12-17 1980-12-17 Manufacturing method for semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17725680A JPS6035823B2 (en) 1980-12-17 1980-12-17 Manufacturing method for semiconductor devices

Publications (2)

Publication Number Publication Date
JPS57102029A true JPS57102029A (en) 1982-06-24
JPS6035823B2 JPS6035823B2 (en) 1985-08-16

Family

ID=16027888

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17725680A Expired JPS6035823B2 (en) 1980-12-17 1980-12-17 Manufacturing method for semiconductor devices

Country Status (1)

Country Link
JP (1) JPS6035823B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005046921A1 (en) * 2003-11-04 2005-05-26 Reactive Nanotechnologies, Inc. Methods and device for controlling pressure through a compliant element in reactive multilayer joining and resulting product joined according to this method
US7121402B2 (en) 2003-04-09 2006-10-17 Reactive Nano Technologies, Inc Container hermetically sealed with crushable material and reactive multilayer material
CN105118789A (en) * 2015-07-21 2015-12-02 宁波芯科电力半导体有限公司 Low-temperature combination method for thyristor chips

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0161326U (en) * 1988-03-23 1989-04-19

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7121402B2 (en) 2003-04-09 2006-10-17 Reactive Nano Technologies, Inc Container hermetically sealed with crushable material and reactive multilayer material
US7143568B2 (en) 2003-04-09 2006-12-05 Reactive Nano Technologies, Inc. Hermetically sealing a container with crushable material and reactive multilayer material
WO2005046921A1 (en) * 2003-11-04 2005-05-26 Reactive Nanotechnologies, Inc. Methods and device for controlling pressure through a compliant element in reactive multilayer joining and resulting product joined according to this method
US7441688B2 (en) 2003-11-04 2008-10-28 Reactive Nanotechnologies Methods and device for controlling pressure in reactive multilayer joining and resulting product
CN105118789A (en) * 2015-07-21 2015-12-02 宁波芯科电力半导体有限公司 Low-temperature combination method for thyristor chips

Also Published As

Publication number Publication date
JPS6035823B2 (en) 1985-08-16

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