JPS5710936A - Forming method for contact hole - Google Patents

Forming method for contact hole

Info

Publication number
JPS5710936A
JPS5710936A JP8687680A JP8687680A JPS5710936A JP S5710936 A JPS5710936 A JP S5710936A JP 8687680 A JP8687680 A JP 8687680A JP 8687680 A JP8687680 A JP 8687680A JP S5710936 A JPS5710936 A JP S5710936A
Authority
JP
Japan
Prior art keywords
etched
film
films
centering
silicon nitride
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8687680A
Other languages
English (en)
Inventor
Shinichi Konishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP8687680A priority Critical patent/JPS5710936A/ja
Publication of JPS5710936A publication Critical patent/JPS5710936A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)
JP8687680A 1980-06-25 1980-06-25 Forming method for contact hole Pending JPS5710936A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8687680A JPS5710936A (en) 1980-06-25 1980-06-25 Forming method for contact hole

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8687680A JPS5710936A (en) 1980-06-25 1980-06-25 Forming method for contact hole

Publications (1)

Publication Number Publication Date
JPS5710936A true JPS5710936A (en) 1982-01-20

Family

ID=13899026

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8687680A Pending JPS5710936A (en) 1980-06-25 1980-06-25 Forming method for contact hole

Country Status (1)

Country Link
JP (1) JPS5710936A (ja)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58147122A (ja) * 1982-02-26 1983-09-01 Fujitsu Ltd 化合物半導体装置の製造方法
JPS5931028A (ja) * 1982-08-13 1984-02-18 Sharp Corp 半導体装置の製造方法
JPS607737A (ja) * 1983-06-27 1985-01-16 Nec Corp 半導体装置の製造方法
JPH06509171A (ja) * 1991-07-22 1994-10-13 アクティエボラゲット ボルボ 帯状可撓要素の所定張力を指示するための装置
CN103489757A (zh) * 2013-10-16 2014-01-01 信利半导体有限公司 一种用于叠层绝缘薄膜的刻蚀方法

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58147122A (ja) * 1982-02-26 1983-09-01 Fujitsu Ltd 化合物半導体装置の製造方法
JPH0354461B2 (ja) * 1982-02-26 1991-08-20
JPS5931028A (ja) * 1982-08-13 1984-02-18 Sharp Corp 半導体装置の製造方法
JPH0138370B2 (ja) * 1982-08-13 1989-08-14 Sharp Kk
JPS607737A (ja) * 1983-06-27 1985-01-16 Nec Corp 半導体装置の製造方法
JPH06509171A (ja) * 1991-07-22 1994-10-13 アクティエボラゲット ボルボ 帯状可撓要素の所定張力を指示するための装置
JP3151218B2 (ja) * 1991-07-22 2001-04-03 アクティエボラゲット ボルボ 帯状可撓要素の所定張力を指示するための装置
CN103489757A (zh) * 2013-10-16 2014-01-01 信利半导体有限公司 一种用于叠层绝缘薄膜的刻蚀方法

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