JPS57100733A - Etching method for semiconductor substrate - Google Patents

Etching method for semiconductor substrate

Info

Publication number
JPS57100733A
JPS57100733A JP17667380A JP17667380A JPS57100733A JP S57100733 A JPS57100733 A JP S57100733A JP 17667380 A JP17667380 A JP 17667380A JP 17667380 A JP17667380 A JP 17667380A JP S57100733 A JPS57100733 A JP S57100733A
Authority
JP
Japan
Prior art keywords
film
region
substrate
depth
etched
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17667380A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6359531B2 (enrdf_load_stackoverflow
Inventor
Shigeo Kodama
Takaaki Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP17667380A priority Critical patent/JPS57100733A/ja
Publication of JPS57100733A publication Critical patent/JPS57100733A/ja
Publication of JPS6359531B2 publication Critical patent/JPS6359531B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)
JP17667380A 1980-12-15 1980-12-15 Etching method for semiconductor substrate Granted JPS57100733A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17667380A JPS57100733A (en) 1980-12-15 1980-12-15 Etching method for semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17667380A JPS57100733A (en) 1980-12-15 1980-12-15 Etching method for semiconductor substrate

Publications (2)

Publication Number Publication Date
JPS57100733A true JPS57100733A (en) 1982-06-23
JPS6359531B2 JPS6359531B2 (enrdf_load_stackoverflow) 1988-11-21

Family

ID=16017713

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17667380A Granted JPS57100733A (en) 1980-12-15 1980-12-15 Etching method for semiconductor substrate

Country Status (1)

Country Link
JP (1) JPS57100733A (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6328067A (ja) * 1986-07-22 1988-02-05 Sony Corp 半導体装置の製造方法
EP0607808A3 (en) * 1993-01-07 1997-04-09 Matsushita Electronics Corp Method of etching a semiconductor substrate.
DE10104324A1 (de) * 2001-01-24 2002-08-01 Siemens Ag Verfahren zum Ätz-Strukturieren der Oberfläche eines Bauteils
DE10104323A1 (de) * 2001-01-24 2002-08-01 Siemens Ag Verfahren zum Herstellen einer Rille mit einer Engstelle in der Oberfläche eines Bauteils und Bauteil

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6328067A (ja) * 1986-07-22 1988-02-05 Sony Corp 半導体装置の製造方法
EP0607808A3 (en) * 1993-01-07 1997-04-09 Matsushita Electronics Corp Method of etching a semiconductor substrate.
DE10104324A1 (de) * 2001-01-24 2002-08-01 Siemens Ag Verfahren zum Ätz-Strukturieren der Oberfläche eines Bauteils
DE10104323A1 (de) * 2001-01-24 2002-08-01 Siemens Ag Verfahren zum Herstellen einer Rille mit einer Engstelle in der Oberfläche eines Bauteils und Bauteil

Also Published As

Publication number Publication date
JPS6359531B2 (enrdf_load_stackoverflow) 1988-11-21

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