JPS5587488A - Production of semiconductor device - Google Patents

Production of semiconductor device

Info

Publication number
JPS5587488A
JPS5587488A JP16402678A JP16402678A JPS5587488A JP S5587488 A JPS5587488 A JP S5587488A JP 16402678 A JP16402678 A JP 16402678A JP 16402678 A JP16402678 A JP 16402678A JP S5587488 A JPS5587488 A JP S5587488A
Authority
JP
Japan
Prior art keywords
layer
mask
film
groove
production
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16402678A
Other languages
Japanese (ja)
Other versions
JPS6138869B2 (en
Inventor
Yoshiiku Togei
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16402678A priority Critical patent/JPS5587488A/en
Publication of JPS5587488A publication Critical patent/JPS5587488A/en
Publication of JPS6138869B2 publication Critical patent/JPS6138869B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE: To form drain and gate electrodes separately without any mask with a step previously provided between the portions intended to form both the electrodes.
CONSTITUTION: An Si3N4 mask is applied on a p-epitaxial layer 2 on an n-type Si substrate 1 of crystaline orientation (100) and a V groove is provided thereon by anisotropic etching. The groove surface is covered with an SiO2 film 6 and the mask is removed. An etching of the p-layer to a desired depth gives a step between the film 6 and layer 2. Then, an n-type diffused layer 7 is formed on the surface of the layer 2 and with evaporation, the Al layers 10 and 11 are formed separately due to the existance of the step. This method can reduce the process thereby ensuring formation of highly accurate patterns.
COPYRIGHT: (C)1980,JPO&Japio
JP16402678A 1978-12-25 1978-12-25 Production of semiconductor device Granted JPS5587488A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16402678A JPS5587488A (en) 1978-12-25 1978-12-25 Production of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16402678A JPS5587488A (en) 1978-12-25 1978-12-25 Production of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5587488A true JPS5587488A (en) 1980-07-02
JPS6138869B2 JPS6138869B2 (en) 1986-09-01

Family

ID=15785379

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16402678A Granted JPS5587488A (en) 1978-12-25 1978-12-25 Production of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5587488A (en)

Also Published As

Publication number Publication date
JPS6138869B2 (en) 1986-09-01

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