JPS5687361A - Semiconductor device and its manufacture - Google Patents

Semiconductor device and its manufacture

Info

Publication number
JPS5687361A
JPS5687361A JP16405979A JP16405979A JPS5687361A JP S5687361 A JPS5687361 A JP S5687361A JP 16405979 A JP16405979 A JP 16405979A JP 16405979 A JP16405979 A JP 16405979A JP S5687361 A JPS5687361 A JP S5687361A
Authority
JP
Japan
Prior art keywords
layer
drain
source
film
polycrystalline
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16405979A
Other languages
Japanese (ja)
Inventor
Takahiro Okabe
Masao Tamura
Yasuo Wada
Takashi Tokuyama
Osamu Minato
Shinya Oba
Koji Kozuka
Osamu Okura
Hiroshi Tamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP16405979A priority Critical patent/JPS5687361A/en
Priority to NL8006339A priority patent/NL8006339A/en
Priority to DE19803043913 priority patent/DE3043913A1/en
Publication of JPS5687361A publication Critical patent/JPS5687361A/en
Priority to US06/563,036 priority patent/US4609407A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8221—Three dimensional integrated circuits stacked in different levels
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
    • H01L27/0233—Integrated injection logic structures [I2L]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688—Integrated circuits having a three-dimensional layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes

Abstract

PURPOSE:To reduce the parasitic capacities of source and drain of the semiconductor device and to enable a high speed operation by a method wherein the FET is manufactured using a laser anneal epitaxial growth method. CONSTITUTION:An SiO2 film 32 is formed on a P type Si single crystalline substrate 31 providing an opening part, and an amorphous Si layer or a polycrystalline Si layer 35 is formed on it. The whole surface is irradiated with a laser beam applying the Q-switching method to convert the amorphous Si layer or the polycrystalline Si layer into a single crystalline Si film 35. The diffusion treatment is performed with the Si film 35 to form N<+> type regions 33, 34 and electrodes 37, 38 are provided to be used as the source, drain, and a center part electrode 36 is provided to be used as the gate. Accordingly the capacities of the source 33, the drain 34 against the substrate 31 are reduced, and the high frequency characteristic can be improved.
JP16405979A 1979-11-21 1979-12-19 Semiconductor device and its manufacture Pending JPS5687361A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP16405979A JPS5687361A (en) 1979-12-19 1979-12-19 Semiconductor device and its manufacture
NL8006339A NL8006339A (en) 1979-11-21 1980-11-20 SEMICONDUCTOR DEVICE AND METHOD FOR THE MANUFACTURE THEREOF.
DE19803043913 DE3043913A1 (en) 1979-11-21 1980-11-21 SEMICONDUCTOR ARRANGEMENT AND METHOD FOR THEIR PRODUCTION
US06/563,036 US4609407A (en) 1979-11-21 1983-12-19 Method of making three dimensional semiconductor devices in selectively laser regrown polysilicon or amorphous silicon layers

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16405979A JPS5687361A (en) 1979-12-19 1979-12-19 Semiconductor device and its manufacture

Publications (1)

Publication Number Publication Date
JPS5687361A true JPS5687361A (en) 1981-07-15

Family

ID=15785996

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16405979A Pending JPS5687361A (en) 1979-11-21 1979-12-19 Semiconductor device and its manufacture

Country Status (1)

Country Link
JP (1) JPS5687361A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5730372A (en) * 1980-07-31 1982-02-18 Fujitsu Ltd Semiconductor device
JPS587869A (en) * 1981-07-07 1983-01-17 Nec Corp Semiconductor device
JPS5833869A (en) * 1981-08-25 1983-02-28 Toshiba Corp Semiconductor device
JPS6039859A (en) * 1983-08-12 1985-03-01 Fujitsu Ltd Semiconductor device
JPS6135565A (en) * 1984-07-27 1986-02-20 Hitachi Ltd Thin film transistor
JPS63304657A (en) * 1987-06-04 1988-12-12 Fujitsu Ltd Manufacture of semiconductor device
KR100379859B1 (en) * 1994-05-02 2003-07-18 소니 가부시끼 가이샤 Manufacturing method of semiconductor chip for display

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS503780A (en) * 1973-05-15 1975-01-16
JPS5491185A (en) * 1977-12-28 1979-07-19 Fujitsu Ltd Semiconductor divece

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS503780A (en) * 1973-05-15 1975-01-16
JPS5491185A (en) * 1977-12-28 1979-07-19 Fujitsu Ltd Semiconductor divece

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5730372A (en) * 1980-07-31 1982-02-18 Fujitsu Ltd Semiconductor device
JPH0147022B2 (en) * 1980-07-31 1989-10-12 Fujitsu Ltd
JPS587869A (en) * 1981-07-07 1983-01-17 Nec Corp Semiconductor device
JPS5833869A (en) * 1981-08-25 1983-02-28 Toshiba Corp Semiconductor device
JPS6039859A (en) * 1983-08-12 1985-03-01 Fujitsu Ltd Semiconductor device
JPS6135565A (en) * 1984-07-27 1986-02-20 Hitachi Ltd Thin film transistor
JPS63304657A (en) * 1987-06-04 1988-12-12 Fujitsu Ltd Manufacture of semiconductor device
KR100379859B1 (en) * 1994-05-02 2003-07-18 소니 가부시끼 가이샤 Manufacturing method of semiconductor chip for display

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