JPS5658267A - Insulated gate type field-effect transistor - Google Patents
Insulated gate type field-effect transistorInfo
- Publication number
- JPS5658267A JPS5658267A JP13290879A JP13290879A JPS5658267A JP S5658267 A JPS5658267 A JP S5658267A JP 13290879 A JP13290879 A JP 13290879A JP 13290879 A JP13290879 A JP 13290879A JP S5658267 A JPS5658267 A JP S5658267A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- region
- nose
- drain region
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005669 field effect Effects 0.000 title 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 6
- 229910052681 coesite Inorganic materials 0.000 abstract 3
- 229910052906 cristobalite Inorganic materials 0.000 abstract 3
- 239000000377 silicon dioxide Substances 0.000 abstract 3
- 235000012239 silicon dioxide Nutrition 0.000 abstract 3
- 229910052682 stishovite Inorganic materials 0.000 abstract 3
- 229910052905 tridymite Inorganic materials 0.000 abstract 3
- 230000005684 electric field Effects 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 238000009792 diffusion process Methods 0.000 abstract 1
- 239000012535 impurity Substances 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
- H01L29/0623—Buried supplementary region, e.g. buried guard ring
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
- H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
- H01L29/0873—Drain regions
- H01L29/0878—Impurity concentration or distribution
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
Abstract
PURPOSE:To decrease the concentration of an electric field and increase dielectric resistance by a mechanism wherein a gate SiO2 film is formed on a wall surface of a concave section made up to a drain region when preparing a longitudinal MOSFET, and a region having the extremely low concentration of impurities is previously formed into the drain region at a nose of the concave section. CONSTITUTION:An N<-> layer 202 functioning as the second drain region is grown on an N<+> type semiconductor substrate 201 serving as the first drain region in an epitaxial shape, a P type layer 203 is formed on the layer 202, and an N<+> type source region 204 is made up into the layer 203 in a diffusion shape. A groove section 205, which is located at the central section of the region 204 and a nose thereof is put into the layer 202, is bored, the wall surface is coated with an Al gate electrode 207 through a gate SiO2 film 206, a window is opened to the SiO2 film formed on an exposed surface of the layer 203 and a source electrode 208 contacting with the region 204 is made up, and a drain electrode 209 is built up on the back of the substrate 201, thus forming an FET. An N(-)(-) type region 210 is previously made up into the layer 202 in response to the nose of the groove section 205 in this constitution, the distribution of potential here is eased, the concentration of an electric field is decreased, and the FET is made resistent to high voltage.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13290879A JPS5658267A (en) | 1979-10-17 | 1979-10-17 | Insulated gate type field-effect transistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13290879A JPS5658267A (en) | 1979-10-17 | 1979-10-17 | Insulated gate type field-effect transistor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5658267A true JPS5658267A (en) | 1981-05-21 |
Family
ID=15092333
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13290879A Pending JPS5658267A (en) | 1979-10-17 | 1979-10-17 | Insulated gate type field-effect transistor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5658267A (en) |
Cited By (29)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5840857A (en) * | 1981-08-10 | 1983-03-09 | シ−メンス・アクチエンゲゼルシヤフト | Epitaxial transistor |
EP0308612A2 (en) * | 1987-09-24 | 1989-03-29 | Mitsubishi Denki Kabushiki Kaisha | Field effect transistor and manufacturing method thereof |
US4835586A (en) * | 1987-09-21 | 1989-05-30 | Siliconix Incorporated | Dual-gate high density fet |
US4983535A (en) * | 1981-10-15 | 1991-01-08 | Siliconix Incorporated | Vertical DMOS transistor fabrication process |
JPH04251983A (en) * | 1991-01-09 | 1992-09-08 | Toshiba Corp | Semiconductor device |
EP0523223A1 (en) * | 1991-01-31 | 1993-01-20 | SILICONIX Incorporated | Power metal-oxide-semiconductor field effect transistor |
US5350934A (en) * | 1992-03-05 | 1994-09-27 | Kabushiki Kaisha Toshiba | Conductivity modulation type insulated gate field effect transistor |
US5532179A (en) * | 1992-07-24 | 1996-07-02 | Siliconix Incorporated | Method of making a field effect trench transistor having lightly doped epitaxial region on the surface portion thereof |
US5558313A (en) * | 1992-07-24 | 1996-09-24 | Siliconix Inorporated | Trench field effect transistor with reduced punch-through susceptibility and low RDSon |
US5578851A (en) * | 1994-08-15 | 1996-11-26 | Siliconix Incorporated | Trenched DMOS transistor having thick field oxide in termination region |
US5597765A (en) * | 1995-01-10 | 1997-01-28 | Siliconix Incorporated | Method for making termination structure for power MOSFET |
JPH1012877A (en) * | 1996-06-27 | 1998-01-16 | Nec Corp | Vertical field effect transistor |
US5821583A (en) * | 1996-03-06 | 1998-10-13 | Siliconix Incorporated | Trenched DMOS transistor with lightly doped tub |
US5923979A (en) * | 1997-09-03 | 1999-07-13 | Siliconix Incorporated | Planar DMOS transistor fabricated by a three mask process |
US5929481A (en) * | 1996-07-19 | 1999-07-27 | Siliconix Incorporated | High density trench DMOS transistor with trench bottom implant |
JP2001267570A (en) * | 2000-03-15 | 2001-09-28 | Mitsubishi Electric Corp | Semiconductor device and method of manufacturing semiconductor device |
JP2002026324A (en) * | 2000-04-04 | 2002-01-25 | Internatl Rectifier Corp | Improved low voltage power mosfet device and process for its manufacturing |
US6753573B2 (en) * | 2002-11-06 | 2004-06-22 | Renesas Technology Corp. | Semiconductor device having complementary MOS transistor |
US6800899B2 (en) * | 2001-08-30 | 2004-10-05 | Micron Technology, Inc. | Vertical transistors, electrical devices containing a vertical transistor, and computer systems containing a vertical transistor |
US7229872B2 (en) | 2000-04-04 | 2007-06-12 | International Rectifier Corporation | Low voltage power MOSFET device and process for its manufacture |
JP2012199515A (en) * | 2011-03-10 | 2012-10-18 | Toshiba Corp | Semiconductor device and method of manufacturing the same |
US8889511B2 (en) | 2003-05-20 | 2014-11-18 | Fairchild Semiconductor Corporation | Methods of manufacturing power semiconductor devices with trenched shielded split gate transistor |
US9224853B2 (en) | 2007-12-26 | 2015-12-29 | Fairchild Semiconductor Corporation | Shielded gate trench FET with multiple channels |
CN106158925A (en) * | 2015-05-14 | 2016-11-23 | 富士电机株式会社 | Semiconductor device and the manufacture method of semiconductor device |
US9614043B2 (en) | 2012-02-09 | 2017-04-04 | Vishay-Siliconix | MOSFET termination trench |
JP6237845B1 (en) * | 2016-08-24 | 2017-11-29 | 富士電機株式会社 | Vertical MOSFET and manufacturing method of vertical MOSFET |
US9842911B2 (en) | 2012-05-30 | 2017-12-12 | Vishay-Siliconix | Adaptive charge balanced edge termination |
US9882044B2 (en) | 2014-08-19 | 2018-01-30 | Vishay-Siliconix | Edge termination for super-junction MOSFETs |
US9887259B2 (en) | 2014-06-23 | 2018-02-06 | Vishay-Siliconix | Modulated super junction power MOSFET devices |
-
1979
- 1979-10-17 JP JP13290879A patent/JPS5658267A/en active Pending
Cited By (51)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5840857A (en) * | 1981-08-10 | 1983-03-09 | シ−メンス・アクチエンゲゼルシヤフト | Epitaxial transistor |
JPH0481343B2 (en) * | 1981-08-10 | 1992-12-22 | Siemens Ag | |
US4983535A (en) * | 1981-10-15 | 1991-01-08 | Siliconix Incorporated | Vertical DMOS transistor fabrication process |
US4835586A (en) * | 1987-09-21 | 1989-05-30 | Siliconix Incorporated | Dual-gate high density fet |
EP0308612A2 (en) * | 1987-09-24 | 1989-03-29 | Mitsubishi Denki Kabushiki Kaisha | Field effect transistor and manufacturing method thereof |
JPH04251983A (en) * | 1991-01-09 | 1992-09-08 | Toshiba Corp | Semiconductor device |
EP0523223A1 (en) * | 1991-01-31 | 1993-01-20 | SILICONIX Incorporated | Power metal-oxide-semiconductor field effect transistor |
EP0523223A4 (en) * | 1991-01-31 | 1993-09-22 | Siliconix Incorporated | Power metal-oxide-semiconductor field effect transistor |
US5350934A (en) * | 1992-03-05 | 1994-09-27 | Kabushiki Kaisha Toshiba | Conductivity modulation type insulated gate field effect transistor |
US5532179A (en) * | 1992-07-24 | 1996-07-02 | Siliconix Incorporated | Method of making a field effect trench transistor having lightly doped epitaxial region on the surface portion thereof |
US5558313A (en) * | 1992-07-24 | 1996-09-24 | Siliconix Inorporated | Trench field effect transistor with reduced punch-through susceptibility and low RDSon |
US5910669A (en) * | 1992-07-24 | 1999-06-08 | Siliconix Incorporated | Field effect Trench transistor having lightly doped epitaxial region on the surface portion thereof |
US5981344A (en) * | 1992-07-24 | 1999-11-09 | Siliconix Incorporated | Trench field effect transistor with reduced punch-through susceptibility and low RDSon |
US5578851A (en) * | 1994-08-15 | 1996-11-26 | Siliconix Incorporated | Trenched DMOS transistor having thick field oxide in termination region |
US5639676A (en) * | 1994-08-15 | 1997-06-17 | Siliconix Incorporated | Trenched DMOS transistor fabrication having thick termination region oxide |
US5597765A (en) * | 1995-01-10 | 1997-01-28 | Siliconix Incorporated | Method for making termination structure for power MOSFET |
US5614751A (en) * | 1995-01-10 | 1997-03-25 | Siliconix Incorporated | Edge termination structure for power MOSFET |
EP0808513A4 (en) * | 1995-02-10 | 1998-10-07 | Siliconix Inc | TRENCH FIELD EFFECT TRANSISTOR WITH REDUCED PUNCH-THROUGH SUSCEPTIBILITY AND LOW R DSon? |
EP0808513A1 (en) * | 1995-02-10 | 1997-11-26 | Siliconix Incorporated | TRENCH FIELD EFFECT TRANSISTOR WITH REDUCED PUNCH-THROUGH SUSCEPTIBILITY AND LOW R DSon? |
US5821583A (en) * | 1996-03-06 | 1998-10-13 | Siliconix Incorporated | Trenched DMOS transistor with lightly doped tub |
JPH1012877A (en) * | 1996-06-27 | 1998-01-16 | Nec Corp | Vertical field effect transistor |
US5929481A (en) * | 1996-07-19 | 1999-07-27 | Siliconix Incorporated | High density trench DMOS transistor with trench bottom implant |
US5923979A (en) * | 1997-09-03 | 1999-07-13 | Siliconix Incorporated | Planar DMOS transistor fabricated by a three mask process |
JP2001267570A (en) * | 2000-03-15 | 2001-09-28 | Mitsubishi Electric Corp | Semiconductor device and method of manufacturing semiconductor device |
JP2002026324A (en) * | 2000-04-04 | 2002-01-25 | Internatl Rectifier Corp | Improved low voltage power mosfet device and process for its manufacturing |
US7229872B2 (en) | 2000-04-04 | 2007-06-12 | International Rectifier Corporation | Low voltage power MOSFET device and process for its manufacture |
US8487368B2 (en) | 2000-04-04 | 2013-07-16 | International Rectifier Corporation | Low voltage power MOSFET device and process for its manufacture |
US9368587B2 (en) | 2001-01-30 | 2016-06-14 | Fairchild Semiconductor Corporation | Accumulation-mode field effect transistor with improved current capability |
US6800899B2 (en) * | 2001-08-30 | 2004-10-05 | Micron Technology, Inc. | Vertical transistors, electrical devices containing a vertical transistor, and computer systems containing a vertical transistor |
US7041556B2 (en) | 2001-08-30 | 2006-05-09 | Micron Technology, Inc. | Vertical transistor and method of making |
US7355244B2 (en) | 2001-08-30 | 2008-04-08 | Micron Technology, Inc. | Electrical devices with multi-walled recesses |
US6753573B2 (en) * | 2002-11-06 | 2004-06-22 | Renesas Technology Corp. | Semiconductor device having complementary MOS transistor |
US8936985B2 (en) | 2003-05-20 | 2015-01-20 | Fairchild Semiconductor Corporation | Methods related to power semiconductor devices with thick bottom oxide layers |
US8889511B2 (en) | 2003-05-20 | 2014-11-18 | Fairchild Semiconductor Corporation | Methods of manufacturing power semiconductor devices with trenched shielded split gate transistor |
US9224853B2 (en) | 2007-12-26 | 2015-12-29 | Fairchild Semiconductor Corporation | Shielded gate trench FET with multiple channels |
US9041008B2 (en) | 2011-03-10 | 2015-05-26 | Kabushiki Kaisha Toshiba | Semiconductor device and method of manufacturing the same |
JP2012199515A (en) * | 2011-03-10 | 2012-10-18 | Toshiba Corp | Semiconductor device and method of manufacturing the same |
US9935193B2 (en) | 2012-02-09 | 2018-04-03 | Siliconix Technology C. V. | MOSFET termination trench |
US9614043B2 (en) | 2012-02-09 | 2017-04-04 | Vishay-Siliconix | MOSFET termination trench |
US9842911B2 (en) | 2012-05-30 | 2017-12-12 | Vishay-Siliconix | Adaptive charge balanced edge termination |
US10229988B2 (en) | 2012-05-30 | 2019-03-12 | Vishay-Siliconix | Adaptive charge balanced edge termination |
US9887259B2 (en) | 2014-06-23 | 2018-02-06 | Vishay-Siliconix | Modulated super junction power MOSFET devices |
US10283587B2 (en) | 2014-06-23 | 2019-05-07 | Vishay-Siliconix | Modulated super junction power MOSFET devices |
US9882044B2 (en) | 2014-08-19 | 2018-01-30 | Vishay-Siliconix | Edge termination for super-junction MOSFETs |
US10340377B2 (en) | 2014-08-19 | 2019-07-02 | Vishay-Siliconix | Edge termination for super-junction MOSFETs |
JP2016219446A (en) * | 2015-05-14 | 2016-12-22 | 富士電機株式会社 | Semiconductor device and method of manufacturing the same |
CN106158925A (en) * | 2015-05-14 | 2016-11-23 | 富士电机株式会社 | Semiconductor device and the manufacture method of semiconductor device |
US10593787B2 (en) | 2015-05-14 | 2020-03-17 | Fuji Electric Co., Ltd. | Semiconductor device and method of manufacturing semiconductor device |
US10943997B2 (en) | 2015-05-14 | 2021-03-09 | Fuji Electric Co., Ltd. | Semiconductor device and method of manufacturing semiconductor device |
JP6237845B1 (en) * | 2016-08-24 | 2017-11-29 | 富士電機株式会社 | Vertical MOSFET and manufacturing method of vertical MOSFET |
JP2018032741A (en) * | 2016-08-24 | 2018-03-01 | 富士電機株式会社 | Vertical mosfet and manufacturing method of vertical mosfet |
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