JPS5626471A - Mos type semiconductor device - Google Patents

Mos type semiconductor device

Info

Publication number
JPS5626471A
JPS5626471A JP10242879A JP10242879A JPS5626471A JP S5626471 A JPS5626471 A JP S5626471A JP 10242879 A JP10242879 A JP 10242879A JP 10242879 A JP10242879 A JP 10242879A JP S5626471 A JPS5626471 A JP S5626471A
Authority
JP
Japan
Prior art keywords
region
conductivity type
regions
type semiconductor
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10242879A
Other languages
Japanese (ja)
Inventor
Hideyoshi Shimura
Takashi Osone
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP10242879A priority Critical patent/JPS5626471A/en
Publication of JPS5626471A publication Critical patent/JPS5626471A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/107Substrate region of field-effect devices
    • H01L29/1075Substrate region of field-effect devices of field-effect transistors
    • H01L29/1079Substrate region of field-effect devices of field-effect transistors with insulated gate
    • H01L29/1083Substrate region of field-effect devices of field-effect transistors with insulated gate with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To avoid decrease in thershold voltage, when providing a reverse conductivity type island-shape region in a one conductivity type semiconductor substrate and forming an MOS type element in this region, by providing a high-impurity-concentration region of the same conductivity type as the island-shape region under a source or a drain. CONSTITUTION:A reverse conductivity type island-shape region 22 is provided on a top layer section of one conductivity type semiconductor substrate 21, a one conductivity type source region 23 and a drain region 24 are dispersingly formed in this region 22, and a gate electrode 25 is attached through a gate insulation membrane 26 onto the region 22 exposed between these regions, so that an MOS type semiconductor substrate device is formed. In this consitution, regions 30 and 30', which has the same conductivity type as the region 22 but a higher impurity concentration, are provided in advance at least on the region 23 and 24 or under these regions. It is possible, by doing so, to prevent stretching and piercing of a depletion layer 27 formed in the regions 23 and 24 and also to increase mutual conductance.
JP10242879A 1979-08-10 1979-08-10 Mos type semiconductor device Pending JPS5626471A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10242879A JPS5626471A (en) 1979-08-10 1979-08-10 Mos type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10242879A JPS5626471A (en) 1979-08-10 1979-08-10 Mos type semiconductor device

Publications (1)

Publication Number Publication Date
JPS5626471A true JPS5626471A (en) 1981-03-14

Family

ID=14327181

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10242879A Pending JPS5626471A (en) 1979-08-10 1979-08-10 Mos type semiconductor device

Country Status (1)

Country Link
JP (1) JPS5626471A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62217666A (en) * 1986-03-18 1987-09-25 Nippon Denso Co Ltd Mis transistor
JPS62274780A (en) * 1986-05-23 1987-11-28 Nec Corp Semiconductor device
JPS6353972A (en) * 1986-08-22 1988-03-08 Hitachi Ltd Composite semiconductor device
US4885627A (en) * 1988-10-18 1989-12-05 International Business Machines Corporation Method and structure for reducing resistance in integrated circuits
US5208168A (en) * 1990-11-26 1993-05-04 Motorola, Inc. Semiconductor device having punch-through protected buried contacts and method for making the same
JPH06295990A (en) * 1993-12-27 1994-10-21 Nippondenso Co Ltd Manufacture of complementary mis transistor

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS515970A (en) * 1974-06-03 1976-01-19 Fairchild Camera Instr Co
JPS5384485A (en) * 1976-12-29 1978-07-25 Fujitsu Ltd Mos-type semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS515970A (en) * 1974-06-03 1976-01-19 Fairchild Camera Instr Co
JPS5384485A (en) * 1976-12-29 1978-07-25 Fujitsu Ltd Mos-type semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62217666A (en) * 1986-03-18 1987-09-25 Nippon Denso Co Ltd Mis transistor
JPS62274780A (en) * 1986-05-23 1987-11-28 Nec Corp Semiconductor device
JPS6353972A (en) * 1986-08-22 1988-03-08 Hitachi Ltd Composite semiconductor device
US4885627A (en) * 1988-10-18 1989-12-05 International Business Machines Corporation Method and structure for reducing resistance in integrated circuits
US5208168A (en) * 1990-11-26 1993-05-04 Motorola, Inc. Semiconductor device having punch-through protected buried contacts and method for making the same
JPH06295990A (en) * 1993-12-27 1994-10-21 Nippondenso Co Ltd Manufacture of complementary mis transistor

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