JPS6476768A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPS6476768A
JPS6476768A JP62232319A JP23231987A JPS6476768A JP S6476768 A JPS6476768 A JP S6476768A JP 62232319 A JP62232319 A JP 62232319A JP 23231987 A JP23231987 A JP 23231987A JP S6476768 A JPS6476768 A JP S6476768A
Authority
JP
Japan
Prior art keywords
concentration impurity
drain
low concentration
gate electrode
decrease
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62232319A
Other languages
Japanese (ja)
Inventor
Hideji Miyake
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62232319A priority Critical patent/JPS6476768A/en
Publication of JPS6476768A publication Critical patent/JPS6476768A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66659Lateral single gate silicon transistors with asymmetry in the channel direction, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/6653Unipolar field-effect transistors with an insulated gate, i.e. MISFET using the removal of at least part of spacer, e.g. disposable spacer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/6656Unipolar field-effect transistors with an insulated gate, i.e. MISFET using multiple spacer layers, e.g. multiple sidewall spacers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7835Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs

Abstract

PURPOSE:To decrease electric field intensity in a drain depletion layer without decreasing mutual conductance, and decrease the number of generating hot carriers, by forming a low concentration impurity region just under a gate electrode, in the manner in which the length is short on the source side and long on the drain side. CONSTITUTION:On the drain side of a gate electrode 3, a first side wall 4 and a second side wall 5 are formed so as to overlap each other. On the source side, the second side wall only is formed. The source-drain region 6, 7 of a semiconductor substrate 1 is constituted of low concentration impurity regions 6a, 7a and high concentration impurity regions 6b, 7b. In the former, low concentration N-type impurity is introduced. In the latter, high concentration impurity is introduced. On the drain side, the low concentration impurity region 7a is formed to have a long length, so that electric field intensity in a depletion layer of the drain region is decreased, and the generation of hot carrier can be restrained. On the source side, the low concentration impurity region 6a just under the gate electrode 3 is made short, so that channel resistance can be reduced, and the decrease of mutual conductance can be prevented.
JP62232319A 1987-09-18 1987-09-18 Semiconductor device and manufacture thereof Pending JPS6476768A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62232319A JPS6476768A (en) 1987-09-18 1987-09-18 Semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62232319A JPS6476768A (en) 1987-09-18 1987-09-18 Semiconductor device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS6476768A true JPS6476768A (en) 1989-03-22

Family

ID=16937338

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62232319A Pending JPS6476768A (en) 1987-09-18 1987-09-18 Semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS6476768A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5254865A (en) * 1991-07-12 1993-10-19 Nec Corporation Semiconductor integrated circuit device employing MOSFETS
FR2801421A1 (en) * 1999-11-18 2001-05-25 St Microelectronics Sa MOS transistor with extended drain region has spacer on the drain side extending from side of gate to drain region and entirely covering the drain extension region
JP2005064508A (en) * 2003-08-11 2005-03-10 Samsung Electronics Co Ltd High voltage transistor and manufacturing method therefor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5254865A (en) * 1991-07-12 1993-10-19 Nec Corporation Semiconductor integrated circuit device employing MOSFETS
FR2801421A1 (en) * 1999-11-18 2001-05-25 St Microelectronics Sa MOS transistor with extended drain region has spacer on the drain side extending from side of gate to drain region and entirely covering the drain extension region
JP2005064508A (en) * 2003-08-11 2005-03-10 Samsung Electronics Co Ltd High voltage transistor and manufacturing method therefor

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