JPH11265938A - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法Info
- Publication number
- JPH11265938A JPH11265938A JP10068309A JP6830998A JPH11265938A JP H11265938 A JPH11265938 A JP H11265938A JP 10068309 A JP10068309 A JP 10068309A JP 6830998 A JP6830998 A JP 6830998A JP H11265938 A JPH11265938 A JP H11265938A
- Authority
- JP
- Japan
- Prior art keywords
- film
- semiconductor device
- barrier metal
- forming
- metal film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/7685—Barrier, adhesion or liner layers the layer covering a conductive structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76805—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
- H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10068309A JPH11265938A (ja) | 1998-03-18 | 1998-03-18 | 半導体装置及びその製造方法 |
| US09/268,678 US6313535B1 (en) | 1998-03-18 | 1999-03-16 | Wiring layer of a semiconductor integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10068309A JPH11265938A (ja) | 1998-03-18 | 1998-03-18 | 半導体装置及びその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH11265938A true JPH11265938A (ja) | 1999-09-28 |
| JPH11265938A5 JPH11265938A5 (enExample) | 2005-07-14 |
Family
ID=13370089
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10068309A Pending JPH11265938A (ja) | 1998-03-18 | 1998-03-18 | 半導体装置及びその製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6313535B1 (enExample) |
| JP (1) | JPH11265938A (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040191697A1 (en) * | 2003-03-24 | 2004-09-30 | Communications Research Laboratory | Method for processing a niobium type thin film and method for manufacturing a superconducting integrated circuit |
| JP4447419B2 (ja) * | 2004-09-29 | 2010-04-07 | Necエレクトロニクス株式会社 | 半導体装置の製造方法 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4158613A (en) * | 1978-12-04 | 1979-06-19 | Burroughs Corporation | Method of forming a metal interconnect structure for integrated circuits |
| US4786962A (en) * | 1986-06-06 | 1988-11-22 | Hewlett-Packard Company | Process for fabricating multilevel metal integrated circuits and structures produced thereby |
| JP2655213B2 (ja) * | 1991-10-14 | 1997-09-17 | 三菱電機株式会社 | 半導体装置の配線接続構造およびその製造方法 |
| US5635763A (en) * | 1993-03-22 | 1997-06-03 | Sanyo Electric Co., Ltd. | Semiconductor device having cap-metal layer |
| US5518805A (en) * | 1994-04-28 | 1996-05-21 | Xerox Corporation | Hillock-free multilayer metal lines for high performance thin film structures |
| US5818110A (en) * | 1996-11-22 | 1998-10-06 | International Business Machines Corporation | Integrated circuit chip wiring structure with crossover capability and method of manufacturing the same |
-
1998
- 1998-03-18 JP JP10068309A patent/JPH11265938A/ja active Pending
-
1999
- 1999-03-16 US US09/268,678 patent/US6313535B1/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US6313535B1 (en) | 2001-11-06 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20041117 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20041117 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20060126 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20080205 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20080916 |