JPH10512112A - パルス型フリップフロップ回路 - Google Patents
パルス型フリップフロップ回路Info
- Publication number
- JPH10512112A JPH10512112A JP8521121A JP52112195A JPH10512112A JP H10512112 A JPH10512112 A JP H10512112A JP 8521121 A JP8521121 A JP 8521121A JP 52112195 A JP52112195 A JP 52112195A JP H10512112 A JPH10512112 A JP H10512112A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- data
- latch
- pulse
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/037—Bistable circuits
Landscapes
- Logic Circuits (AREA)
- Surface Treatment Of Glass Fibres Or Filaments (AREA)
- Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
- Optical Fibers, Optical Fiber Cores, And Optical Fiber Bundles (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6-18561 | 1994-02-15 | ||
| US08/367,103 US5557225A (en) | 1994-12-30 | 1994-12-30 | Pulsed flip-flop circuit |
| US08/367,103 | 1994-12-30 | ||
| PCT/US1995/016878 WO1996021272A1 (en) | 1994-12-30 | 1995-12-28 | A pulsed flip-flop circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPWO1995021800A1 JPWO1995021800A1 (ja) | 1996-06-25 |
| JPH10512112A true JPH10512112A (ja) | 1998-11-17 |
Family
ID=23445947
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8521121A Ceased JPH10512112A (ja) | 1994-12-30 | 1995-12-28 | パルス型フリップフロップ回路 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US5557225A (enExample) |
| EP (1) | EP0800719A4 (enExample) |
| JP (1) | JPH10512112A (enExample) |
| CN (1) | CN1175327A (enExample) |
| AU (1) | AU4742696A (enExample) |
| TW (1) | TW301082B (enExample) |
| WO (1) | WO1996021272A1 (enExample) |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008172779A (ja) * | 2007-01-08 | 2008-07-24 | Samsung Electronics Co Ltd | 高速動作のためのフリップフロップ |
| JP2010273322A (ja) * | 2009-04-23 | 2010-12-02 | Nec Engineering Ltd | 多数決回路付きフリップフロップ回路 |
| JP2011502443A (ja) * | 2007-10-31 | 2011-01-20 | クゥアルコム・インコーポレイテッド | ラッチ構造及びラッチを用いる自己調整パルス生成器 |
| JP2011509644A (ja) * | 2008-01-09 | 2011-03-24 | クゥアルコム・インコーポレイテッド | ラッチ回路デバイスの条件付き制御のシステム及び方法 |
| JP2012070421A (ja) * | 2005-05-25 | 2012-04-05 | Toshiba Corp | 半導体集積回路装置 |
| JP2012521700A (ja) * | 2009-03-23 | 2012-09-13 | オティコン アクティーセルスカプ | スキャン・テスト・サポートを有する低電力デュアル・エッジ・トリガ型記憶セル及びそのためのクロック・ゲーティング回路 |
| US8395431B2 (en) | 2006-06-19 | 2013-03-12 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit device |
| JP5182291B2 (ja) * | 2007-11-12 | 2013-04-17 | 富士通セミコンダクター株式会社 | 半導体装置 |
| US9564881B2 (en) | 2015-05-22 | 2017-02-07 | Qualcomm Incorporated | Area-efficient metal-programmable pulse latch design |
| US9979394B2 (en) | 2016-02-16 | 2018-05-22 | Qualcomm Incorporated | Pulse-generator |
Families Citing this family (42)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5867718A (en) * | 1995-11-29 | 1999-02-02 | National Semiconductor Corporation | Method and apparatus for waking up a computer system via a parallel port |
| US5825225A (en) * | 1996-02-09 | 1998-10-20 | Intel Corporation | Boosted differential latch |
| US6173379B1 (en) * | 1996-05-14 | 2001-01-09 | Intel Corporation | Memory device for a microprocessor register file having a power management scheme and method for copying information between memory sub-cells in a single clock cycle |
| US5999029A (en) * | 1996-06-28 | 1999-12-07 | Lsi Logic Corporation | Meta-hardened flip-flop |
| US6064246A (en) * | 1996-10-15 | 2000-05-16 | Kabushiki Kaisha Toshiba | Logic circuit employing flip-flop circuit |
| KR100258855B1 (ko) * | 1997-01-08 | 2000-06-15 | 김영환 | 데이타 유지 회로 |
| US6026496A (en) * | 1997-12-31 | 2000-02-15 | Micron Technology, Inc. | Method and apparatus for generating a pulse |
| US6185720B1 (en) * | 1998-06-19 | 2001-02-06 | Intel Corporation | Slaveless synchronous system design |
| US6326829B1 (en) * | 1999-10-14 | 2001-12-04 | Hewlett-Packard Company | Pulse latch with explicit, logic-enabled one-shot |
| KR100516693B1 (ko) * | 2003-04-02 | 2005-09-22 | 주식회사 하이닉스반도체 | 불휘발성 프로그래머블 로직 회로 |
| US6369631B1 (en) | 2000-06-29 | 2002-04-09 | Intel Corporation | High performance impulse flip-flops |
| US6346828B1 (en) | 2000-06-30 | 2002-02-12 | Intel Corporation | Method and apparatus for pulsed clock tri-state control |
| SE519113C2 (sv) * | 2000-11-10 | 2003-01-14 | Ericsson Telefon Ab L M | Anordning för fångning av data |
| JP2004246525A (ja) * | 2003-02-13 | 2004-09-02 | Matsushita Electric Ind Co Ltd | 順序回路、記憶素子、クロック発生回路およびクロック制御方法、ならびに回路変更方法および回路設計支援装置、半導体集積回路およびそれを備えた電子装置、ならびに電子制御装置およびそれを備えた移動体 |
| US7173475B1 (en) * | 2003-03-26 | 2007-02-06 | Cypress Semiconductor Corp. | Signal transmission amplifier circuit |
| US6937079B1 (en) | 2003-07-28 | 2005-08-30 | University Of Louisiana At Lafayette | Single-transistor-clocked flip-flop |
| JP3958322B2 (ja) * | 2004-01-28 | 2007-08-15 | シャープ株式会社 | シフトレジスタ、およびアクティブマトリクス型表示装置 |
| KR100604847B1 (ko) * | 2004-04-26 | 2006-07-26 | 삼성전자주식회사 | 저-전력 고속 래치와 이를 구비하는 데이터 저장장치 |
| KR100612417B1 (ko) * | 2004-07-21 | 2006-08-16 | 삼성전자주식회사 | 펄스-기반 고속 저전력 게이티드 플롭플롭 회로 |
| US7109776B2 (en) * | 2004-09-23 | 2006-09-19 | Intel Corporation | Gating for dual edge-triggered clocking |
| US7193444B1 (en) * | 2005-10-20 | 2007-03-20 | Chris Karabatsos | High speed data bit latch circuit |
| US7319344B2 (en) * | 2005-12-15 | 2008-01-15 | P.A. Semi, Inc. | Pulsed flop with embedded logic |
| DE102005063097B4 (de) * | 2005-12-30 | 2014-09-04 | Infineon Technologies Ag | Gepulstes statisches Flip-Flop |
| US7622965B2 (en) * | 2006-01-31 | 2009-11-24 | International Business Machines Corporation | Dual-edge shaping latch/synchronizer for re-aligning edges |
| US20090195285A1 (en) * | 2006-06-05 | 2009-08-06 | Panasonic Corporation | Semiconductor integrated circuit |
| US7982521B2 (en) * | 2006-10-03 | 2011-07-19 | Freescale Semiconductor, Inc. | Device and system for reducing noise induced errors |
| US7583103B2 (en) * | 2007-03-30 | 2009-09-01 | Altera Corporation | Configurable time borrowing flip-flops |
| US7746137B2 (en) * | 2007-08-28 | 2010-06-29 | Qualcomm Incorporated | Sequential circuit element including a single clocked transistor |
| US7391250B1 (en) * | 2007-09-02 | 2008-06-24 | United Microelectronics Corp. | Data retention cell and data retention method based on clock-gating and feedback mechanism |
| US7872516B2 (en) * | 2008-11-25 | 2011-01-18 | Oracle America, Inc. | Precision pulse generator |
| US7816966B1 (en) * | 2009-04-16 | 2010-10-19 | Oracle America, Inc. | Economy precision pulse generator |
| JP5359521B2 (ja) * | 2009-04-24 | 2013-12-04 | ソニー株式会社 | バイナリ値変換回路およびその方法、ad変換装置、固体撮像素子、並びにカメラシステム |
| US8067971B2 (en) * | 2009-09-18 | 2011-11-29 | Arm Limited | Providing additional inputs to a latch circuit |
| US8143929B2 (en) | 2009-10-28 | 2012-03-27 | Freescale Semiconductor, Inc. | Flip-flop having shared feedback and method of operation |
| US8791739B2 (en) | 2009-10-28 | 2014-07-29 | Freescale Semiconductor, Inc. | Flip-flop having shared feedback and method of operation |
| FR2963687A1 (fr) * | 2010-08-06 | 2012-02-10 | Dolphin Integration Sa | Arbre d'horloge pour bascules commandees par impulsions |
| US8063685B1 (en) | 2010-08-08 | 2011-11-22 | Freescale Semiconductor, Inc. | Pulsed flip-flop circuit |
| US8564354B2 (en) * | 2011-08-03 | 2013-10-22 | Qualcomm Incorporated | Circuits and methods for latch-tracking pulse generation |
| US8952740B2 (en) * | 2013-02-01 | 2015-02-10 | Industrial Technology Research Institute | Pulsed latching apparatus and method for generating pulse signal of pulsed latch thereof |
| US8841953B2 (en) * | 2013-02-22 | 2014-09-23 | Nvidia Corporation | Low clock energy double-edge-triggered flip-flop circuit |
| US9590602B2 (en) | 2014-06-13 | 2017-03-07 | Stmicroelectronics International N.V. | System and method for a pulse generator |
| CN113282531B (zh) * | 2021-05-28 | 2023-08-11 | 福州大学 | 基于脉冲触发的二端口串行数据收发电路及方法 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1256752A (enExample) * | 1968-06-08 | 1971-12-15 | ||
| JPS56104529A (en) * | 1980-01-24 | 1981-08-20 | Yamatake Honeywell Co Ltd | Flip-flop circuit |
| JPS5979630A (ja) * | 1982-10-29 | 1984-05-08 | Hitachi Ltd | 論理回路 |
| JPH0763135B2 (ja) * | 1986-09-05 | 1995-07-05 | 日本電気株式会社 | 半導体集積論理回路 |
| IT1221969B (it) * | 1987-07-07 | 1990-08-31 | Montedison Spa | Registro asincrono ad ingressi mutlipli |
| JPH02205110A (ja) * | 1989-02-03 | 1990-08-15 | Matsushita Electric Ind Co Ltd | フリップフロップ回路装置 |
| IT1236578B (it) * | 1989-07-04 | 1993-03-16 | Ind Face Standard S P A Milano | Dispositivo per la trasformazione di un flip flop di tipo d in un flip flop denominato di tipo b in grado di campionare i dati sui fronti di salita e sui fronti di discesa del segnale di clock. |
| US5038059A (en) * | 1990-02-20 | 1991-08-06 | Vlsi Technology, Inc. | Status register with asynchronous set and reset signals |
| US5023486A (en) * | 1990-03-30 | 1991-06-11 | Atmel Corporation | Logic output control circuit for a latch |
| US5059818A (en) * | 1990-06-01 | 1991-10-22 | Advanced Micro Devices, Inc. | Self-regulating clock generator |
| JPH05110391A (ja) * | 1991-10-18 | 1993-04-30 | Sharp Corp | Dフリツプフロツプ回路 |
| DE4206082C1 (enExample) * | 1992-02-27 | 1993-04-08 | Siemens Ag, 8000 Muenchen, De | |
| JPH06104701A (ja) * | 1992-09-24 | 1994-04-15 | Nec Ic Microcomput Syst Ltd | フリップフロップ回路 |
-
1994
- 1994-12-30 US US08/367,103 patent/US5557225A/en not_active Expired - Lifetime
-
1995
- 1995-11-15 TW TW084112081A patent/TW301082B/zh active
- 1995-12-28 WO PCT/US1995/016878 patent/WO1996021272A1/en not_active Ceased
- 1995-12-28 AU AU47426/96A patent/AU4742696A/en not_active Abandoned
- 1995-12-28 JP JP8521121A patent/JPH10512112A/ja not_active Ceased
- 1995-12-28 CN CN95197685A patent/CN1175327A/zh active Pending
- 1995-12-28 EP EP95944660A patent/EP0800719A4/en not_active Withdrawn
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012070421A (ja) * | 2005-05-25 | 2012-04-05 | Toshiba Corp | 半導体集積回路装置 |
| US8395431B2 (en) | 2006-06-19 | 2013-03-12 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit device |
| US8558595B2 (en) | 2006-06-19 | 2013-10-15 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit device |
| JP2008172779A (ja) * | 2007-01-08 | 2008-07-24 | Samsung Electronics Co Ltd | 高速動作のためのフリップフロップ |
| JP2011502443A (ja) * | 2007-10-31 | 2011-01-20 | クゥアルコム・インコーポレイテッド | ラッチ構造及びラッチを用いる自己調整パルス生成器 |
| US8816739B2 (en) | 2007-11-12 | 2014-08-26 | Fujitsu Semiconductor Limited | Semiconductor device |
| JP5182291B2 (ja) * | 2007-11-12 | 2013-04-17 | 富士通セミコンダクター株式会社 | 半導体装置 |
| US9287857B2 (en) | 2007-11-12 | 2016-03-15 | Socionext Inc. | Semiconductor device |
| JP2011509644A (ja) * | 2008-01-09 | 2011-03-24 | クゥアルコム・インコーポレイテッド | ラッチ回路デバイスの条件付き制御のシステム及び方法 |
| JP2012521700A (ja) * | 2009-03-23 | 2012-09-13 | オティコン アクティーセルスカプ | スキャン・テスト・サポートを有する低電力デュアル・エッジ・トリガ型記憶セル及びそのためのクロック・ゲーティング回路 |
| JP2010273322A (ja) * | 2009-04-23 | 2010-12-02 | Nec Engineering Ltd | 多数決回路付きフリップフロップ回路 |
| US9564881B2 (en) | 2015-05-22 | 2017-02-07 | Qualcomm Incorporated | Area-efficient metal-programmable pulse latch design |
| US9979394B2 (en) | 2016-02-16 | 2018-05-22 | Qualcomm Incorporated | Pulse-generator |
Also Published As
| Publication number | Publication date |
|---|---|
| US5557225A (en) | 1996-09-17 |
| EP0800719A4 (en) | 1999-12-22 |
| WO1996021272A1 (en) | 1996-07-11 |
| EP0800719A1 (en) | 1997-10-15 |
| AU4742696A (en) | 1996-07-24 |
| TW301082B (enExample) | 1997-03-21 |
| CN1175327A (zh) | 1998-03-04 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20050705 |
|
| A313 | Final decision of rejection without a dissenting response from the applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A313 Effective date: 20051011 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20051220 |