IT1221969B - Registro asincrono ad ingressi mutlipli - Google Patents

Registro asincrono ad ingressi mutlipli

Info

Publication number
IT1221969B
IT1221969B IT21201/87A IT2120187A IT1221969B IT 1221969 B IT1221969 B IT 1221969B IT 21201/87 A IT21201/87 A IT 21201/87A IT 2120187 A IT2120187 A IT 2120187A IT 1221969 B IT1221969 B IT 1221969B
Authority
IT
Italy
Prior art keywords
mutlip
inputs
asynchronous register
asynchronous
register
Prior art date
Application number
IT21201/87A
Other languages
English (en)
Other versions
IT8721201A0 (it
Inventor
Beltramini Angelo
Original Assignee
Montedison Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Montedison Spa filed Critical Montedison Spa
Publication of IT8721201A0 publication Critical patent/IT8721201A0/it
Priority to IT21201/87A priority Critical patent/IT1221969B/it
Priority to US07/214,381 priority patent/US4893028A/en
Priority to IL86977A priority patent/IL86977A0/xx
Priority to ZA884805A priority patent/ZA884805B/xx
Priority to AU18778/88A priority patent/AU602991B2/en
Priority to BR8803391A priority patent/BR8803391A/pt
Priority to EP88306230A priority patent/EP0298747A3/en
Priority to JP63169983A priority patent/JPH01164114A/ja
Priority to KR1019880008515A priority patent/KR890002768A/ko
Application granted granted Critical
Publication of IT1221969B publication Critical patent/IT1221969B/it

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037Bistable circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
  • Shift Register Type Memory (AREA)
IT21201/87A 1987-07-07 1987-07-07 Registro asincrono ad ingressi mutlipli IT1221969B (it)

Priority Applications (9)

Application Number Priority Date Filing Date Title
IT21201/87A IT1221969B (it) 1987-07-07 1987-07-07 Registro asincrono ad ingressi mutlipli
US07/214,381 US4893028A (en) 1987-07-07 1988-07-01 One or more input asynchronous register
IL86977A IL86977A0 (en) 1987-07-07 1988-07-04 One or more input asynchronous register
ZA884805A ZA884805B (en) 1987-07-07 1988-07-05 One or more input asynchronous register
AU18778/88A AU602991B2 (en) 1987-07-07 1988-07-06 One or more input asynchronous register
BR8803391A BR8803391A (pt) 1987-07-07 1988-07-07 Registrador
EP88306230A EP0298747A3 (en) 1987-07-07 1988-07-07 Register
JP63169983A JPH01164114A (ja) 1987-07-07 1988-07-07 レジスタ装置
KR1019880008515A KR890002768A (ko) 1987-07-07 1988-07-07 하나 이상의 입력 비동기 레지스터

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT21201/87A IT1221969B (it) 1987-07-07 1987-07-07 Registro asincrono ad ingressi mutlipli

Publications (2)

Publication Number Publication Date
IT8721201A0 IT8721201A0 (it) 1987-07-07
IT1221969B true IT1221969B (it) 1990-08-31

Family

ID=11178295

Family Applications (1)

Application Number Title Priority Date Filing Date
IT21201/87A IT1221969B (it) 1987-07-07 1987-07-07 Registro asincrono ad ingressi mutlipli

Country Status (9)

Country Link
US (1) US4893028A (it)
EP (1) EP0298747A3 (it)
JP (1) JPH01164114A (it)
KR (1) KR890002768A (it)
AU (1) AU602991B2 (it)
BR (1) BR8803391A (it)
IL (1) IL86977A0 (it)
IT (1) IT1221969B (it)
ZA (1) ZA884805B (it)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4980577A (en) * 1987-06-18 1990-12-25 Advanced Micro Devices, Inc. Dual triggered edge-sensitive asynchrounous flip-flop
US5144477A (en) * 1988-04-11 1992-09-01 Medical Research Council Method of operating a scanning confocal imaging system
US5125011A (en) * 1990-02-13 1992-06-23 Chips & Technologies, Inc. Apparatus for masking data bits
US5124568A (en) * 1991-02-14 1992-06-23 Advanced Micro Devices, Inc. Edge-triggered flip-flop
US5557225A (en) * 1994-12-30 1996-09-17 Intel Corporation Pulsed flip-flop circuit
US5781053A (en) * 1996-08-21 1998-07-14 Advanced Micro Devices Inc. Positive edge triggered flip flop

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2030807B (en) * 1978-10-02 1982-11-10 Ibm Latch circuit
US4607173A (en) * 1984-03-14 1986-08-19 At&T Bell Laboratories Dual-clock edge triggered flip-flop circuits
US4695743A (en) * 1985-10-23 1987-09-22 Hughes Aircraft Company Multiple input dissymmetric latch

Also Published As

Publication number Publication date
JPH01164114A (ja) 1989-06-28
EP0298747A2 (en) 1989-01-11
IT8721201A0 (it) 1987-07-07
EP0298747A3 (en) 1989-11-15
IL86977A0 (en) 1988-12-30
ZA884805B (en) 1989-03-29
BR8803391A (pt) 1989-01-24
KR890002768A (ko) 1989-04-11
US4893028A (en) 1990-01-09
AU602991B2 (en) 1990-11-01
AU1877888A (en) 1989-01-12

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