KR890700243A - N-비트 합-캐리 누산기 - Google Patents

N-비트 합-캐리 누산기

Info

Publication number
KR890700243A
KR890700243A KR1019880701050A KR880701050A KR890700243A KR 890700243 A KR890700243 A KR 890700243A KR 1019880701050 A KR1019880701050 A KR 1019880701050A KR 880701050 A KR880701050 A KR 880701050A KR 890700243 A KR890700243 A KR 890700243A
Authority
KR
South Korea
Prior art keywords
bit sum
carry accumulator
accumulator
carry
bit
Prior art date
Application number
KR1019880701050A
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of KR890700243A publication Critical patent/KR890700243A/ko

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50Adding; Subtracting
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50Adding; Subtracting
    • G06F7/505Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
    • G06F7/509Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination for multiple operands, e.g. digital integrators
    • G06F7/5095Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination for multiple operands, e.g. digital integrators word-serial, i.e. with an accumulator-register
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/68Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using pulse rate multipliers or dividers pulse rate multipliers or dividers per se

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Complex Calculations (AREA)
KR1019880701050A 1986-12-30 1988-08-29 N-비트 합-캐리 누산기 KR890700243A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US94778686A 1986-12-30 1986-12-30
PCT/US1987/003291 WO1988005189A1 (en) 1986-12-30 1987-12-07 N-bit sum-carry accumulator

Publications (1)

Publication Number Publication Date
KR890700243A true KR890700243A (ko) 1989-03-10

Family

ID=25486767

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880701050A KR890700243A (ko) 1986-12-30 1988-08-29 N-비트 합-캐리 누산기

Country Status (5)

Country Link
EP (1) EP0294476A1 (ko)
JP (1) JPH01501905A (ko)
KR (1) KR890700243A (ko)
IL (1) IL84822A0 (ko)
WO (1) WO1988005189A1 (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20050088506A (ko) 2004-03-02 2005-09-07 삼성전자주식회사 다중 세정도를 지원하는 확장형 몽고메리 모듈러 곱셈기

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1549552A1 (de) * 1967-07-19 1971-03-04 Telefunken Patent Anordnung zum Erzeugen einer Folge elektrischer Impulse vorwaehlbarer Anzahl pro Zeiteinheit
GB2161963B (en) * 1984-07-18 1988-02-03 Marconi Co Ltd Accumulator

Also Published As

Publication number Publication date
JPH01501905A (ja) 1989-06-29
WO1988005189A1 (en) 1988-07-14
IL84822A0 (en) 1988-06-30
EP0294476A1 (en) 1988-12-14

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Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E601 Decision to refuse application