JPH10189908A - 金属酸化物キャパシタの作製方法及び半導体メモリ装置の製造方法 - Google Patents

金属酸化物キャパシタの作製方法及び半導体メモリ装置の製造方法

Info

Publication number
JPH10189908A
JPH10189908A JP8355139A JP35513996A JPH10189908A JP H10189908 A JPH10189908 A JP H10189908A JP 8355139 A JP8355139 A JP 8355139A JP 35513996 A JP35513996 A JP 35513996A JP H10189908 A JPH10189908 A JP H10189908A
Authority
JP
Japan
Prior art keywords
capacitor
metal oxide
electrode
manufacturing
post
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8355139A
Other languages
English (en)
Japanese (ja)
Other versions
JPH10189908A5 (enExample
Inventor
Yukio Fukuda
幸夫 福田
Katsuhiro Aoki
克裕 青木
Ken Numata
乾 沼田
Akitoshi Nishimura
明俊 西村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Japan Ltd
Original Assignee
Texas Instruments Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Japan Ltd filed Critical Texas Instruments Japan Ltd
Priority to JP8355139A priority Critical patent/JPH10189908A/ja
Priority to US08/993,873 priority patent/US6150183A/en
Publication of JPH10189908A publication Critical patent/JPH10189908A/ja
Publication of JPH10189908A5 publication Critical patent/JPH10189908A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02197—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Optics & Photonics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP8355139A 1996-12-20 1996-12-20 金属酸化物キャパシタの作製方法及び半導体メモリ装置の製造方法 Pending JPH10189908A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP8355139A JPH10189908A (ja) 1996-12-20 1996-12-20 金属酸化物キャパシタの作製方法及び半導体メモリ装置の製造方法
US08/993,873 US6150183A (en) 1996-12-20 1997-12-18 Method for manufacturing metal oxide capacitor and method for manufacturing semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8355139A JPH10189908A (ja) 1996-12-20 1996-12-20 金属酸化物キャパシタの作製方法及び半導体メモリ装置の製造方法

Publications (2)

Publication Number Publication Date
JPH10189908A true JPH10189908A (ja) 1998-07-21
JPH10189908A5 JPH10189908A5 (enExample) 2004-11-04

Family

ID=18442174

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8355139A Pending JPH10189908A (ja) 1996-12-20 1996-12-20 金属酸化物キャパシタの作製方法及び半導体メモリ装置の製造方法

Country Status (2)

Country Link
US (1) US6150183A (enExample)
JP (1) JPH10189908A (enExample)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6338996B1 (en) 1999-04-21 2002-01-15 Nec Corporation Semiconductor memory device production method
JP2004296681A (ja) * 2003-03-26 2004-10-21 Seiko Epson Corp 強誘電体膜、強誘電体膜の製造方法、強誘電体キャパシタおよび強誘電体キャパシタの製造方法ならびに強誘電体メモリ
EP1096555A3 (en) * 1999-10-25 2005-11-02 Nec Corporation Semiconductor device and production thereof
JP2007103963A (ja) * 2006-12-11 2007-04-19 Seiko Epson Corp 強誘電体キャパシタの製造方法、強誘電体キャパシタおよび半導体装置
JP2015026693A (ja) * 2013-07-25 2015-02-05 株式会社ユーテック 膜の製造方法及びマルチチャンバー装置
JP2015026692A (ja) * 2013-07-25 2015-02-05 株式会社ユーテック 結晶化方法及び加圧式ランプアニール装置

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3769711B2 (ja) * 1997-11-28 2006-04-26 ローム株式会社 キャパシタの製法
KR100280206B1 (ko) * 1997-12-06 2001-03-02 윤종용 고유전체 캐패시터 및 그의 제조 방법
KR100331270B1 (ko) * 1999-07-01 2002-04-06 박종섭 ＴａＯＮ박막을 갖는 커패시터 제조방법
GB2358284B (en) * 1999-07-02 2004-07-14 Hyundai Electronics Ind Method of manufacturing capacitor for semiconductor memory device
JP2001077108A (ja) * 1999-08-31 2001-03-23 Nec Corp 半導体装置及び複合酸化物薄膜の製造方法
US6268281B1 (en) * 1999-11-15 2001-07-31 Taiwan Semiconductor Manufacturing Company Method to form self-aligned contacts with polysilicon plugs
JP2002190580A (ja) * 2000-12-20 2002-07-05 Mitsubishi Electric Corp 半導体装置およびその製造方法
US6426250B1 (en) * 2001-05-24 2002-07-30 Taiwan Semiconductor Manufacturing Company High density stacked MIM capacitor structure
US6566148B2 (en) * 2001-08-13 2003-05-20 Sharp Laboratories Of America, Inc. Method of making a ferroelectric memory transistor
JP4609621B2 (ja) * 2002-12-24 2011-01-12 セイコーエプソン株式会社 強誘電体キャパシタの製造方法
JP4221576B2 (ja) * 2003-03-10 2009-02-12 セイコーエプソン株式会社 セラミックス膜の製造方法および強誘電体キャパシタの製造方法、ならびにセラミックス膜、強誘電体キャパシタおよび半導体装置
JP4264708B2 (ja) * 2003-03-18 2009-05-20 セイコーエプソン株式会社 セラミックス膜の製造方法
US7164166B2 (en) * 2004-03-19 2007-01-16 Intel Corporation Memory circuit with spacers between ferroelectric layer and electrodes
JP4878123B2 (ja) * 2005-02-07 2012-02-15 浜松ホトニクス株式会社 固体撮像装置
JP4332748B2 (ja) * 2005-12-27 2009-09-16 セイコーエプソン株式会社 セラミックス膜の製造方法およびセラミックス膜製造装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5443030A (en) * 1992-01-08 1995-08-22 Sharp Kabushiki Kaisha Crystallizing method of ferroelectric film

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6338996B1 (en) 1999-04-21 2002-01-15 Nec Corporation Semiconductor memory device production method
EP1096555A3 (en) * 1999-10-25 2005-11-02 Nec Corporation Semiconductor device and production thereof
JP2004296681A (ja) * 2003-03-26 2004-10-21 Seiko Epson Corp 強誘電体膜、強誘電体膜の製造方法、強誘電体キャパシタおよび強誘電体キャパシタの製造方法ならびに強誘電体メモリ
JP2007103963A (ja) * 2006-12-11 2007-04-19 Seiko Epson Corp 強誘電体キャパシタの製造方法、強誘電体キャパシタおよび半導体装置
JP2015026693A (ja) * 2013-07-25 2015-02-05 株式会社ユーテック 膜の製造方法及びマルチチャンバー装置
JP2015026692A (ja) * 2013-07-25 2015-02-05 株式会社ユーテック 結晶化方法及び加圧式ランプアニール装置

Also Published As

Publication number Publication date
US6150183A (en) 2000-11-21

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