JPH09261031A - 半導体集積回路の出力バッファ回路 - Google Patents

半導体集積回路の出力バッファ回路

Info

Publication number
JPH09261031A
JPH09261031A JP8064040A JP6404096A JPH09261031A JP H09261031 A JPH09261031 A JP H09261031A JP 8064040 A JP8064040 A JP 8064040A JP 6404096 A JP6404096 A JP 6404096A JP H09261031 A JPH09261031 A JP H09261031A
Authority
JP
Japan
Prior art keywords
output
input
terminal
inverter
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP8064040A
Other languages
English (en)
Japanese (ja)
Inventor
Kenichiro Sugio
賢一郎 杉尾
Tetsuya Mitoma
徹哉 三苫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Oki Micro Design Miyazaki Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Oki Micro Design Miyazaki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd, Oki Micro Design Miyazaki Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP8064040A priority Critical patent/JPH09261031A/ja
Priority to US08/808,255 priority patent/US5825215A/en
Priority to EP97103711A priority patent/EP0797210B1/en
Priority to DE69717893T priority patent/DE69717893T2/de
Priority to KR1019970009197A priority patent/KR100331946B1/ko
Priority to CN97103099A priority patent/CN1107379C/zh
Priority to TW086102529A priority patent/TW353247B/zh
Publication of JPH09261031A publication Critical patent/JPH09261031A/ja
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
  • Dram (AREA)
JP8064040A 1996-03-21 1996-03-21 半導体集積回路の出力バッファ回路 Withdrawn JPH09261031A (ja)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP8064040A JPH09261031A (ja) 1996-03-21 1996-03-21 半導体集積回路の出力バッファ回路
US08/808,255 US5825215A (en) 1996-03-21 1997-02-28 Output buffer circuit
EP97103711A EP0797210B1 (en) 1996-03-21 1997-03-06 Output buffer circuit
DE69717893T DE69717893T2 (de) 1996-03-21 1997-03-06 Ausgangpufferschaltung
KR1019970009197A KR100331946B1 (ko) 1996-03-21 1997-03-18 출력버퍼회로
CN97103099A CN1107379C (zh) 1996-03-21 1997-03-21 输出缓冲电路
TW086102529A TW353247B (en) 1996-03-21 1997-05-30 Output buffer device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8064040A JPH09261031A (ja) 1996-03-21 1996-03-21 半導体集積回路の出力バッファ回路

Publications (1)

Publication Number Publication Date
JPH09261031A true JPH09261031A (ja) 1997-10-03

Family

ID=13246616

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8064040A Withdrawn JPH09261031A (ja) 1996-03-21 1996-03-21 半導体集積回路の出力バッファ回路

Country Status (7)

Country Link
US (1) US5825215A (zh)
EP (1) EP0797210B1 (zh)
JP (1) JPH09261031A (zh)
KR (1) KR100331946B1 (zh)
CN (1) CN1107379C (zh)
DE (1) DE69717893T2 (zh)
TW (1) TW353247B (zh)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW402841B (en) * 1997-04-24 2000-08-21 Hitachi Ltd Complementary MOS semiconductor circuit
JP2977556B1 (ja) * 1999-01-13 1999-11-15 沖電気工業株式会社 出力回路
JP4337995B2 (ja) * 1999-03-08 2009-09-30 日本テキサス・インスツルメンツ株式会社 駆動回路およびそれを用いたチャージポンプ昇圧回路
US6262605B1 (en) * 1999-05-06 2001-07-17 International Business Machines Corporation Automated line driver control circuit for power managed system
US6329835B1 (en) 2000-02-23 2001-12-11 Pericom Semiconductor Corp. Quiet output buffers with neighbor sensing of wide bus and control signals
KR100363479B1 (ko) * 2000-06-29 2002-11-30 주식회사 하이닉스반도체 이중 경로를 갖는 입력버퍼
KR100411394B1 (ko) * 2001-06-29 2003-12-18 주식회사 하이닉스반도체 메모리장치의 데이터출력회로
ITVA20050054A1 (it) * 2005-09-23 2007-03-24 St Microelectronics Srl Metodo e circuito di controllo di uno stadio di potenza a commutazione
JP4769108B2 (ja) * 2006-03-29 2011-09-07 川崎マイクロエレクトロニクス株式会社 出力バッファ回路
US8976103B2 (en) 2007-06-29 2015-03-10 Japan Display West Inc. Display apparatus, driving method for display apparatus and electronic apparatus
US9166028B2 (en) 2011-05-31 2015-10-20 Infineon Technologies Austria Ag Circuit configured to adjust the activation state of transistors based on load conditions
US8618842B2 (en) * 2011-09-30 2013-12-31 Qualcomm Incorporated Differential PVT/timing-skew-tolerant self-correcting circuits
CN103390379B (zh) * 2012-05-11 2016-08-31 意法半导体研发(深圳)有限公司 用于功率驱动器电路应用的电流斜率控制装置
US8912827B2 (en) * 2012-07-09 2014-12-16 Finisar Corporation Driver circuit
CN103618531A (zh) * 2013-11-26 2014-03-05 苏州贝克微电子有限公司 一种嵌入式热关断使能电路
CN103944553B (zh) * 2014-04-18 2017-10-24 京东方科技集团股份有限公司 一种输出缓冲器、栅极驱动电路及其控制方法
CN104242905B (zh) * 2014-09-03 2017-06-06 灿芯半导体(上海)有限公司 Usb输出电路
CN105743489B (zh) * 2016-03-28 2018-07-27 苏州瑞铬优电子科技有限公司 一种无静态功耗的电平转换电路
CN113452363A (zh) * 2020-03-24 2021-09-28 长鑫存储技术(上海)有限公司 动态控制转换电路
US11444619B2 (en) 2020-09-07 2022-09-13 Changxin Memory Technologies, Inc. Driving circuit

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5075569A (en) * 1989-03-17 1991-12-24 Tektronix, Inc. Output device circuit and method to minimize impedance fluctuations during crossover
US5001369A (en) * 1990-07-02 1991-03-19 Micron Technology, Inc. Low noise output buffer circuit
JP2915625B2 (ja) * 1991-06-26 1999-07-05 株式会社沖マイクロデザイン宮崎 データ出力回路
TW220019B (zh) * 1991-12-06 1994-02-01 Nat Semiconductor Corp
KR100261962B1 (ko) * 1993-12-31 2000-07-15 김영환 데이타 출력버퍼
KR960013859B1 (ko) * 1994-02-07 1996-10-10 현대전자산업 주식회사 반도체 소자의 데이타 출력버퍼
JPH0865135A (ja) * 1994-08-17 1996-03-08 Fujitsu Ltd 出力バッファ回路
US5629634A (en) * 1995-08-21 1997-05-13 International Business Machines Corporation Low-power, tristate, off-chip driver circuit

Also Published As

Publication number Publication date
EP0797210A3 (en) 1998-12-16
CN1107379C (zh) 2003-04-30
DE69717893T2 (de) 2003-09-18
US5825215A (en) 1998-10-20
EP0797210A2 (en) 1997-09-24
DE69717893D1 (de) 2003-01-30
CN1165435A (zh) 1997-11-19
EP0797210B1 (en) 2002-12-18
KR100331946B1 (ko) 2002-10-18
TW353247B (en) 1999-02-21

Similar Documents

Publication Publication Date Title
JPH09261031A (ja) 半導体集積回路の出力バッファ回路
US8334709B2 (en) Level shifter
JPH10190438A (ja) レベルシフタ
CN108233894B (zh) 一种基于双模冗余的低功耗双边沿触发器
JP3800255B2 (ja) ウエーブ・プロパゲーシヨン・ロジック
US6853228B2 (en) Flip-flop circuit
EP0237898B1 (en) Semiconductor large scale integrated circuit with noise cut circuit
US6351149B1 (en) MOS transistor output circuit
JPH0389624A (ja) 半導体集積回路
JPH09180452A (ja) メモリのアドレス遷移検出回路
CN110677021B (zh) 一种抗地弹噪声的输出驱动电路
US6825694B2 (en) Flip-flop circuit for use in electronic devices
JP4276513B2 (ja) フリップフロップ回路
JPH0983343A (ja) 信号レベル変換回路
JP2001127595A (ja) フリップフロップ回路
JP3378824B2 (ja) 半導体集積回路
JPH10200384A (ja) 遅延回路
JP2569750B2 (ja) 同期型ドライバ回路
JPH0710044B2 (ja) 論理回路
JPH05160706A (ja) Ｃｍｏｓ出力バッファ回路
JP3185870B2 (ja) 高速高駆動型信号伝送回路
JP2024056139A (ja) Ｄ型フリップフロップ
US5122681A (en) Synchronous BiCMOS logic gate
JPH06120803A (ja) 出力バッファ回路
JPH03153122A (ja) レベル変換回路

Legal Events

Date Code Title Description
A300 Application deemed to be withdrawn because no request for examination was validly filed

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20030603