DE69717893D1 - Ausgangpufferschaltung - Google Patents

Ausgangpufferschaltung

Info

Publication number
DE69717893D1
DE69717893D1 DE69717893T DE69717893T DE69717893D1 DE 69717893 D1 DE69717893 D1 DE 69717893D1 DE 69717893 T DE69717893 T DE 69717893T DE 69717893 T DE69717893 T DE 69717893T DE 69717893 D1 DE69717893 D1 DE 69717893D1
Authority
DE
Germany
Prior art keywords
output buffer
buffer circuit
circuit
output
buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69717893T
Other languages
English (en)
Other versions
DE69717893T2 (de
Inventor
Kenichiro Sugio
Tetsuya Mitoma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lapis Semiconductor Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Publication of DE69717893D1 publication Critical patent/DE69717893D1/de
Application granted granted Critical
Publication of DE69717893T2 publication Critical patent/DE69717893T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
  • Dram (AREA)
DE69717893T 1996-03-21 1997-03-06 Ausgangpufferschaltung Expired - Lifetime DE69717893T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8064040A JPH09261031A (ja) 1996-03-21 1996-03-21 半導体集積回路の出力バッファ回路

Publications (2)

Publication Number Publication Date
DE69717893D1 true DE69717893D1 (de) 2003-01-30
DE69717893T2 DE69717893T2 (de) 2003-09-18

Family

ID=13246616

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69717893T Expired - Lifetime DE69717893T2 (de) 1996-03-21 1997-03-06 Ausgangpufferschaltung

Country Status (7)

Country Link
US (1) US5825215A (de)
EP (1) EP0797210B1 (de)
JP (1) JPH09261031A (de)
KR (1) KR100331946B1 (de)
CN (1) CN1107379C (de)
DE (1) DE69717893T2 (de)
TW (1) TW353247B (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW402841B (en) * 1997-04-24 2000-08-21 Hitachi Ltd Complementary MOS semiconductor circuit
JP2977556B1 (ja) * 1999-01-13 1999-11-15 沖電気工業株式会社 出力回路
JP4337995B2 (ja) * 1999-03-08 2009-09-30 日本テキサス・インスツルメンツ株式会社 駆動回路およびそれを用いたチャージポンプ昇圧回路
US6262605B1 (en) * 1999-05-06 2001-07-17 International Business Machines Corporation Automated line driver control circuit for power managed system
US6329835B1 (en) 2000-02-23 2001-12-11 Pericom Semiconductor Corp. Quiet output buffers with neighbor sensing of wide bus and control signals
KR100363479B1 (ko) * 2000-06-29 2002-11-30 주식회사 하이닉스반도체 이중 경로를 갖는 입력버퍼
KR100411394B1 (ko) * 2001-06-29 2003-12-18 주식회사 하이닉스반도체 메모리장치의 데이터출력회로
ITVA20050054A1 (it) * 2005-09-23 2007-03-24 St Microelectronics Srl Metodo e circuito di controllo di uno stadio di potenza a commutazione
JP4769108B2 (ja) * 2006-03-29 2011-09-07 川崎マイクロエレクトロニクス株式会社 出力バッファ回路
US8976103B2 (en) * 2007-06-29 2015-03-10 Japan Display West Inc. Display apparatus, driving method for display apparatus and electronic apparatus
US9166028B2 (en) 2011-05-31 2015-10-20 Infineon Technologies Austria Ag Circuit configured to adjust the activation state of transistors based on load conditions
US8618842B2 (en) * 2011-09-30 2013-12-31 Qualcomm Incorporated Differential PVT/timing-skew-tolerant self-correcting circuits
CN106027014B (zh) * 2012-05-11 2019-10-01 意法半导体研发(深圳)有限公司 用于功率驱动器电路应用的电流斜率控制方法和装置
US8912827B2 (en) * 2012-07-09 2014-12-16 Finisar Corporation Driver circuit
CN103618531A (zh) * 2013-11-26 2014-03-05 苏州贝克微电子有限公司 一种嵌入式热关断使能电路
CN103944553B (zh) * 2014-04-18 2017-10-24 京东方科技集团股份有限公司 一种输出缓冲器、栅极驱动电路及其控制方法
CN104242905B (zh) * 2014-09-03 2017-06-06 灿芯半导体(上海)有限公司 Usb输出电路
CN105743489B (zh) * 2016-03-28 2018-07-27 苏州瑞铬优电子科技有限公司 一种无静态功耗的电平转换电路
CN113452363A (zh) 2020-03-24 2021-09-28 长鑫存储技术(上海)有限公司 动态控制转换电路
US11444619B2 (en) 2020-09-07 2022-09-13 Changxin Memory Technologies, Inc. Driving circuit

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5075569A (en) * 1989-03-17 1991-12-24 Tektronix, Inc. Output device circuit and method to minimize impedance fluctuations during crossover
US5001369A (en) * 1990-07-02 1991-03-19 Micron Technology, Inc. Low noise output buffer circuit
JP2915625B2 (ja) * 1991-06-26 1999-07-05 株式会社沖マイクロデザイン宮崎 データ出力回路
TW220019B (de) * 1991-12-06 1994-02-01 Nat Semiconductor Corp
KR100261962B1 (ko) * 1993-12-31 2000-07-15 김영환 데이타 출력버퍼
KR960013859B1 (ko) * 1994-02-07 1996-10-10 현대전자산업 주식회사 반도체 소자의 데이타 출력버퍼
JPH0865135A (ja) * 1994-08-17 1996-03-08 Fujitsu Ltd 出力バッファ回路
US5629634A (en) * 1995-08-21 1997-05-13 International Business Machines Corporation Low-power, tristate, off-chip driver circuit

Also Published As

Publication number Publication date
KR100331946B1 (ko) 2002-10-18
TW353247B (en) 1999-02-21
EP0797210B1 (de) 2002-12-18
CN1107379C (zh) 2003-04-30
CN1165435A (zh) 1997-11-19
EP0797210A3 (de) 1998-12-16
EP0797210A2 (de) 1997-09-24
DE69717893T2 (de) 2003-09-18
JPH09261031A (ja) 1997-10-03
US5825215A (en) 1998-10-20

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: OKI SEMICONDUCTOR CO.,LTD., TOKYO, JP