DE69618135D1 - Ausgangsschaltung - Google Patents

Ausgangsschaltung

Info

Publication number
DE69618135D1
DE69618135D1 DE69618135T DE69618135T DE69618135D1 DE 69618135 D1 DE69618135 D1 DE 69618135D1 DE 69618135 T DE69618135 T DE 69618135T DE 69618135 T DE69618135 T DE 69618135T DE 69618135 D1 DE69618135 D1 DE 69618135D1
Authority
DE
Germany
Prior art keywords
output circuit
circuit
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69618135T
Other languages
English (en)
Other versions
DE69618135T2 (de
Inventor
Seiichi Watarai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69618135D1 publication Critical patent/DE69618135D1/de
Publication of DE69618135T2 publication Critical patent/DE69618135T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/14—Modifications for compensating variations of physical values, e.g. of temperature
    • H03K17/145—Modifications for compensating variations of physical values, e.g. of temperature in field-effect transistor switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
    • H03K17/6872—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor using complementary field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00315—Modifications for increasing the reliability for protection in field-effect transistor circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Electronic Switches (AREA)
DE69618135T 1995-10-16 1996-10-16 Ausgangsschaltung Expired - Lifetime DE69618135T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7266936A JP2959449B2 (ja) 1995-10-16 1995-10-16 出力回路

Publications (2)

Publication Number Publication Date
DE69618135D1 true DE69618135D1 (de) 2002-01-31
DE69618135T2 DE69618135T2 (de) 2002-08-29

Family

ID=17437750

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69618135T Expired - Lifetime DE69618135T2 (de) 1995-10-16 1996-10-16 Ausgangsschaltung

Country Status (4)

Country Link
US (1) US5864245A (de)
EP (1) EP0768762B1 (de)
JP (1) JP2959449B2 (de)
DE (1) DE69618135T2 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6066963A (en) * 1997-09-29 2000-05-23 Cypress Semiconductor Corp MOS output driver, and circuit and method of controlling same
US6097237A (en) * 1998-01-29 2000-08-01 Sun Microsystems, Inc. Overshoot/undershoot protection scheme for low voltage output buffer
JP3499748B2 (ja) * 1998-06-12 2004-02-23 Ｎｅｃエレクトロニクス株式会社 順序回路
US6417696B1 (en) * 1999-12-20 2002-07-09 Cypress Semiconductor Corp. Interface circuit for mixed voltage I/O buffer to provide gate oxide protection
US6344958B1 (en) * 2000-02-10 2002-02-05 Fairchild Semiconductor Corp. Overvoltage protection circuit with overvoltage removal sensing
US6329835B1 (en) 2000-02-23 2001-12-11 Pericom Semiconductor Corp. Quiet output buffers with neighbor sensing of wide bus and control signals
US6208178B1 (en) 2000-02-23 2001-03-27 Pericom Semiconductor Corp. CMOS over voltage-tolerant output buffer without transmission gate
US6317000B1 (en) 2000-10-05 2001-11-13 Texas Instruments Incorporated Overload recovery circuit and method
US6724594B2 (en) * 2000-12-20 2004-04-20 National Semiconductor Corporation Over voltage protection test multiplexer and methods of operating the same
US6703900B2 (en) 2002-06-05 2004-03-09 Texas Instruments Incorporated Fast, stable overload recovery circuit and method

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5004936A (en) * 1989-03-31 1991-04-02 Texas Instruments Incorporated Non-loading output driver circuit
US5151619A (en) * 1990-10-11 1992-09-29 International Business Machines Corporation Cmos off chip driver circuit
GB2258100B (en) * 1991-06-28 1995-02-15 Digital Equipment Corp Floating-well CMOS output driver
US5406140A (en) * 1993-06-07 1995-04-11 National Semiconductor Corporation Voltage translation and overvoltage protection
JP3433359B2 (ja) * 1993-06-18 2003-08-04 日本テキサス・インスツルメンツ株式会社 低電圧出力駆動回路
JP3311133B2 (ja) * 1994-02-16 2002-08-05 株式会社東芝 出力回路
US5444397A (en) * 1994-10-05 1995-08-22 Pericom Semiconductor Corp. All-CMOS high-impedance output buffer for a bus driven by multiple power-supply voltages

Also Published As

Publication number Publication date
DE69618135T2 (de) 2002-08-29
US5864245A (en) 1999-01-26
JP2959449B2 (ja) 1999-10-06
EP0768762B1 (de) 2001-12-19
JPH09116415A (ja) 1997-05-02
EP0768762A1 (de) 1997-04-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

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