JPH06101466B2 - シリコン層上に2酸化シリコンの絶縁誘電体層を作る方法 - Google Patents

シリコン層上に2酸化シリコンの絶縁誘電体層を作る方法

Info

Publication number
JPH06101466B2
JPH06101466B2 JP58213177A JP21317783A JPH06101466B2 JP H06101466 B2 JPH06101466 B2 JP H06101466B2 JP 58213177 A JP58213177 A JP 58213177A JP 21317783 A JP21317783 A JP 21317783A JP H06101466 B2 JPH06101466 B2 JP H06101466B2
Authority
JP
Japan
Prior art keywords
layer
silicon
silicon layer
silicon dioxide
amorphous silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58213177A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59103347A (ja
Inventor
ロ−レンツオ・フアラオ−ネ
ロバ−ト・ダニエル・ビブロネク
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Co filed Critical General Electric Co
Publication of JPS59103347A publication Critical patent/JPS59103347A/ja
Publication of JPH06101466B2 publication Critical patent/JPH06101466B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/32105Oxidation of silicon-containing layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Semiconductor Memories (AREA)
  • Recrystallisation Techniques (AREA)
JP58213177A 1982-11-12 1983-11-11 シリコン層上に2酸化シリコンの絶縁誘電体層を作る方法 Expired - Lifetime JPH06101466B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US44137282A 1982-11-12 1982-11-12
US441372 1982-11-12

Publications (2)

Publication Number Publication Date
JPS59103347A JPS59103347A (ja) 1984-06-14
JPH06101466B2 true JPH06101466B2 (ja) 1994-12-12

Family

ID=23752622

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58213177A Expired - Lifetime JPH06101466B2 (ja) 1982-11-12 1983-11-11 シリコン層上に2酸化シリコンの絶縁誘電体層を作る方法

Country Status (6)

Country Link
JP (1) JPH06101466B2 (enrdf_load_stackoverflow)
DE (1) DE3340583A1 (enrdf_load_stackoverflow)
FR (1) FR2536208B1 (enrdf_load_stackoverflow)
GB (1) GB2131407B (enrdf_load_stackoverflow)
IT (1) IT1171798B (enrdf_load_stackoverflow)
SE (1) SE500975C2 (enrdf_load_stackoverflow)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4814291A (en) * 1986-02-25 1989-03-21 American Telephone And Telegraph Company, At&T Bell Laboratories Method of making devices having thin dielectric layers
US4874716A (en) * 1986-04-01 1989-10-17 Texas Instrument Incorporated Process for fabricating integrated circuit structure with extremely smooth polysilicone dielectric interface
EP0281233A1 (en) * 1987-01-30 1988-09-07 AT&T Corp. Improved formation of dielectric on deposited silicon
US5851871A (en) * 1987-12-23 1998-12-22 Sgs-Thomson Microelectronics, S.R.L. Process for manufacturing integrated capacitors in MOS technology
DE69032773T2 (de) * 1989-02-14 1999-05-27 Seiko Epson Corp., Tokio/Tokyo Verfahren zur Herstellung einer Halbleitervorrichtung
EP0545585A3 (en) * 1991-12-03 1996-11-06 American Telephone & Telegraph Integrated circuit fabrication comprising a locos process
US5665620A (en) * 1994-08-01 1997-09-09 Motorola, Inc. Method for forming concurrent top oxides using reoxidized silicon in an EPROM
US5712177A (en) * 1994-08-01 1998-01-27 Motorola, Inc. Method for forming a reverse dielectric stack
EP1192646B1 (en) 1999-06-25 2008-08-13 Massachusetts Institute Of Technology Cyclic thermal anneal for dislocation reduction
CN112992672B (zh) * 2019-12-16 2022-10-14 山东有研半导体材料有限公司 一种硅基二氧化硅背封薄膜的制备方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3900345A (en) * 1973-08-02 1975-08-19 Motorola Inc Thin low temperature epi regions by conversion of an amorphous layer
JPS5910060B2 (ja) * 1976-03-01 1984-03-06 株式会社日立製作所 半導体装置の製造方法
IT1089298B (it) * 1977-01-17 1985-06-18 Mostek Corp Procedimento per fabbricare un dispositivo semiconduttore
US4166919A (en) * 1978-09-25 1979-09-04 Rca Corporation Amorphous silicon solar cell allowing infrared transmission
JPS55115341A (en) * 1979-02-28 1980-09-05 Chiyou Lsi Gijutsu Kenkyu Kumiai Manufacture of semiconductor device
JPS5676537A (en) * 1979-11-27 1981-06-24 Fujitsu Ltd Manufacture of semiconductor device
US4479831A (en) * 1980-09-15 1984-10-30 Burroughs Corporation Method of making low resistance polysilicon gate transistors and low resistance interconnections therefor via gas deposited in-situ doped amorphous layer and heat-treatment
US4358326A (en) * 1980-11-03 1982-11-09 International Business Machines Corporation Epitaxially extended polycrystalline structures utilizing a predeposit of amorphous silicon with subsequent annealing
US4441249A (en) * 1982-05-26 1984-04-10 Bell Telephone Laboratories, Incorporated Semiconductor integrated circuit capacitor

Also Published As

Publication number Publication date
FR2536208A1 (fr) 1984-05-18
SE500975C2 (sv) 1994-10-10
DE3340583C2 (enrdf_load_stackoverflow) 1993-04-29
GB2131407B (en) 1987-02-04
GB2131407A (en) 1984-06-20
SE8306071D0 (sv) 1983-11-04
JPS59103347A (ja) 1984-06-14
SE8306071L (sv) 1984-05-13
DE3340583A1 (de) 1984-05-17
IT1171798B (it) 1987-06-10
IT8323691A0 (it) 1983-11-11
FR2536208B1 (fr) 1987-03-20
GB8329380D0 (en) 1983-12-07

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