CN112992672B - 一种硅基二氧化硅背封薄膜的制备方法 - Google Patents
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Abstract
本发明公开了一种硅基二氧化硅背封薄膜的制备方法,该方法包括高温氧化预处理步骤和低温低压CVD沉积步骤;在高温氧化预处理步骤中,温度为1000℃‑1100℃,氧气流量为20‑30sccm,时间为10‑20min;在低温低压CVD沉积步骤中,温度为600℃‑700℃,正硅酸乙酯的流量为100‑200sccm,氧气流量为150‑250sccm,压力为100‑300MT。本发明的方法通过高温氧化预处理和低温低压CVD沉积组合方式制备二氧化硅背封薄膜,能够显著提升二氧化硅背封薄膜的致密性。本发明工艺控制简单,能够满足硅基材料背封薄膜特别是8英寸以上大直径硅基材料背封薄膜的制备工艺要求。
Description
技术领域
本发明涉及一种硅基二氧化硅背封薄膜的制备方法,属于半导体工艺技术领域。
背景技术
集成电路产业是信息技术产业的核心,是支撑经济社会发展和保障国家安全的战略性、基础性和先导性产业,集成电路产业发展需要硅材料的基础支撑。随着国内节能电子、消费电子、物联网、通讯、工业控制等产业的迅速发展,硅材料的需求量也越来越大,质量要求越来越严格。为了防止重掺杂硅片在外延生产过程中引起杂质的外扩散和自掺杂,引入了硅基背封工艺,即在硅晶圆的背面生长一层二氧化硅薄膜对晶圆衬底片中的杂质进行封堵,防止杂质从衬底中溢出,由于二氧化硅薄膜长在背面,顾名思义称之为背封。
要达到背封的有效的封堵效果,二氧化硅薄膜的致密性就变为最关键的参数。通常从成本和产能综合考量,硅基二氧化硅薄膜最常用的制备方法是低压化学气相沉积(LPCVD),虽然LPCVD成本优势较大,但是用该方法制备的背封膜致密性较差,外延时对杂质的封堵效果也不理想。该方法制备的背封薄膜用电极气泡法检漏大于30个(≤3个致密性合格),外延后测试电阻率均匀性MAX达到8%(要求≤5%),良率75%,工艺效果差良率低。为了解决这个问题,在制备背封膜的方法上做了很多探索,比如APCVD、PECVD方式生长,均未能得到满意的效果。
发明内容
针对现有硅基背封膜存在的以上问题,本发明的目的在于提供一种硅基二氧化硅背封薄膜的制备方法。
为实现上述目的,本发明采用以下技术方案:
一种硅基二氧化硅背封薄膜的制备方法,该方法包括高温氧化预处理步骤和低温低压CVD沉积步骤;在高温氧化预处理步骤中,温度为1000℃-1100℃,氧气流量为20-30sccm,时间为10-20min;在低温低压CVD沉积步骤中,温度为600℃-700℃,正硅酸乙酯(TEOS)流量为100-200sccm,氧气流量为150-250sccm,压力为100-300MT。
在本发明的制备方法中,需遵循先高温预处理后低温低压沉积的既定步骤,只有按此步骤才可获得良好的致密性和BOW、WARP等几何参数。
优选地,在所述高温氧化预处理步骤中,预处理膜厚为250-450埃,为目标膜厚的5%-10%,生长速率为12.5-45埃/分钟;在所述低温低压CVD沉积步骤中,沉积膜厚为目标膜厚的90%-95%,生长速率为70-120埃/分钟。
优选地,在所述低温低压CVD沉积步骤中,所述沉积压力为150-300MT。
本发明的优点在于:
本发明通过先高温氧化预处理和低温低压CVD沉积组合方式制备二氧化硅背封薄膜,能够显著提升二氧化硅背封薄膜的致密性,改善硅基衬底硅片的外延后的几何参数。本发明工艺控制简单,有效提升了二氧化硅背封薄膜的致密性,满足硅基材料背封薄膜的制备要求,特别是8英寸以上大直径硅基材料背封薄膜的制备工艺。
附图说明
图1为本发明的硅基二氧化硅背封膜的制备方法的流程图。
具体实施方式
下面通过实施例对本发明做进一步说明,但并不意味着对本发明保护范围的限制。
如图1所示,本发明的硅基二氧化硅背封薄膜的制备方法具体包括以下几个步骤:
1、硅基衬底片清洗:将预背封的硅基衬底片清洗干净;
2、硅片进行热氧化,做LPCVD前表面预处理:将衬底片放入高温氧化炉,设定好温度、流量和时间进行高温氧化表面预处理;
3、对预处理硅片进行薄膜测试和表面检查,测试基础氧化膜厚度,表面检查合格;
4、合格硅片清洗:预处理合格硅片进行LPCVD前清洗;
5、预处理硅片进行LPCVD沉积:硅片进行LPCVD膜沉积,设定沉积的温度、流量、压力、沉积时间、沉积速率;
6、测试膜厚度和均匀性、致密性;
7、将硅基背封片进行外延处理,测试电阻率均匀性和良率。
以下实施例中所得硅片的膜厚均匀性、外延电阻率均匀性参数完全按SEMI标准进行测试。
实施例1
将100片8英寸预背封的硅基衬底片清洗干净,用理片机将硅片整理成参考面向上;将硅片装入石英舟载入高温氧化炉内,设定好第一步工艺时间为12min,温度为1000℃,氧气流量为20sccm,进行预处理,完成后取出硅片,检查表面,测试预处理膜厚为350埃;再次对硅片进行清洗,整理参考面;设定第二步沉积时间为65min,温度为620℃,压力为180MT,TEOS流量为100sccm,氧气流量为250sccm,进行LPCVD沉积;沉积后取出硅片,测试膜厚为5500埃,测试沉积速率为79.23埃/分钟;片内均匀性为1.3%(要求10%),100片片间均匀性为2.7%(要求10%),对合格样片抽取1片进行电极法检测致密性,气泡数少于3个,无杂质导致的漏电失效,致密性满足要求,然后将硅片进行外延工艺测试,外延后电阻率均匀性为2.4%(要求≤5%),致密性100%满足要求,完全满足外延加工要求。
实施例2
将100片8英寸预背封的硅基衬底片清洗干净,用理片机将硅片整理成参考面向上;将硅片装入石英舟载入高温氧化炉内,设定好第一步工艺时间为15min,温度为1050℃,氧气流量为25sccm,进行预处理,完成后取出硅片,检查表面,测试预处理膜厚为320埃;再次对硅片进行清洗,整理参考面;设定第二步沉积时间为60min,温度为670℃,压力为200MT,TEOS流量为160sccm,氧气流量为200sccm,进行LPCVD沉积;沉积后取出硅片,测试膜厚为5550埃,测试沉积速率为87.16埃/分钟;片内均匀性为1.7%(要求10%),100片片间均匀性为1.9%(要求10%),对合格样片抽取1片进行电极法检测致密性,气泡数少于3个,无杂质导致的漏电失效,致密性满足要求,然后将硅片进行外延工艺测试,外延后电阻率均匀性为2.3%(要求≤5%),致密性100%满足要求,完全满足外延加工要求。
实施例3
将100片6英寸预背封的硅基衬底片清洗干净,用理片机将硅片整理成参考面向上;将硅片装入石英舟载入高温氧化炉内,设定好第一步工艺时间为18min,温度为1100℃,氧气流量为28sccm,进行预处理,完成后取出硅片,检查表面,测试预处理膜厚为400埃;再次对硅片进行清洗,整理参考面;设定第二步沉积时间为52min,温度为690℃,压力为220MT,TEOS流量为190sccm,氧气流量为250sccm,进行LPCVD沉积;沉积后取出硅片,测试膜厚为5860埃,测试沉积速率为105埃/分钟;片内均匀性为2.4%(要求10%),100片片间均匀性为2.9%(要求10%),对合格样片抽取1片进行电极法检测致密性,气泡数少于3个,无杂质导致的漏电失效,致密性满足要求,然后将硅片进行外延工艺测试,外延后电阻率均匀性为3.9%(要求≤5%),致密性100%满足要求,完全满足外延加工要求。
Claims (2)
1.一种硅基二氧化硅背封薄膜的制备方法,其特征在于,该方法包括高温氧化预处理步骤和低温低压CVD沉积步骤;在高温氧化预处理步骤中,温度为1000℃-1100℃,氧气流量为20-30sccm,时间为10-20min;在低温低压CVD沉积步骤中,温度为600℃-700℃,正硅酸乙酯的流量为100-200sccm,氧气流量为150-250sccm,压力为100-300MT;
在所述高温氧化预处理步骤中,预处理膜厚为250-450埃,为目标膜厚的5%-10%,生长速率为12.5-45埃/分钟;在所述低温低压CVD沉积步骤中,沉积膜厚为目标膜厚的90%-95%,生长速率为70-120埃/分钟。
2.根据权利要求1所述的制备方法,其特征在于,在所述低温低压CVD沉积步骤中,所述沉积压力为150-300MT。
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