JPH0568105B2 - - Google Patents
Info
- Publication number
- JPH0568105B2 JPH0568105B2 JP59123918A JP12391884A JPH0568105B2 JP H0568105 B2 JPH0568105 B2 JP H0568105B2 JP 59123918 A JP59123918 A JP 59123918A JP 12391884 A JP12391884 A JP 12391884A JP H0568105 B2 JPH0568105 B2 JP H0568105B2
- Authority
- JP
- Japan
- Prior art keywords
- memory
- data
- layer
- light
- layers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/42—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically- coupled or feedback-coupled
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Memories (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Multi Processors (AREA)
- Memory System (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59123918A JPS613450A (ja) | 1984-06-18 | 1984-06-18 | 三次元光結合共有メモリ集積装置 |
| US06/702,139 US4672577A (en) | 1984-06-18 | 1985-02-15 | Three-dimensional integrated circuit with optically coupled shared memories |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59123918A JPS613450A (ja) | 1984-06-18 | 1984-06-18 | 三次元光結合共有メモリ集積装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS613450A JPS613450A (ja) | 1986-01-09 |
| JPH0568105B2 true JPH0568105B2 (enExample) | 1993-09-28 |
Family
ID=14872561
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59123918A Granted JPS613450A (ja) | 1984-06-18 | 1984-06-18 | 三次元光結合共有メモリ集積装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US4672577A (enExample) |
| JP (1) | JPS613450A (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004507020A (ja) * | 2000-08-14 | 2004-03-04 | マトリックス セミコンダクター インコーポレイテッド | モジュラーメモリデバイス |
Families Citing this family (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0748203B2 (ja) * | 1988-06-17 | 1995-05-24 | 三菱電機株式会社 | 3次元デバイスを用いた正方行列乗算器 |
| JPH0215679A (ja) * | 1988-07-04 | 1990-01-19 | Ricoh Co Ltd | 実装方法 |
| JPH0748206B2 (ja) * | 1989-03-07 | 1995-05-24 | 工業技術院長 | 集積回路装置 |
| WO1991011027A1 (en) * | 1990-01-16 | 1991-07-25 | Iowa State University Research Foundation, Inc. | Non-crystalline silicon active device for large-scale digital and analog networks |
| US5280184A (en) * | 1992-04-08 | 1994-01-18 | Georgia Tech Research Corporation | Three dimensional integrated circuits with lift-off |
| WO1993021663A1 (en) * | 1992-04-08 | 1993-10-28 | Georgia Tech Research Corporation | Process for lift-off of thin film materials from a growth substrate |
| US6483736B2 (en) | 1998-11-16 | 2002-11-19 | Matrix Semiconductor, Inc. | Vertically stacked field programmable nonvolatile memory and method of fabrication |
| JP2000231546A (ja) | 1999-02-12 | 2000-08-22 | Univ Hiroshima | 共有メモリ |
| JP3643864B2 (ja) | 1999-05-18 | 2005-04-27 | 国立大学法人広島大学 | 酸化膜の角で生じるキャリヤのディープレベル捕獲を利用した不揮発性メモリ |
| JP4334173B2 (ja) * | 1999-07-06 | 2009-09-30 | 三菱電機株式会社 | 駆動制御システム |
| US8575719B2 (en) | 2000-04-28 | 2013-11-05 | Sandisk 3D Llc | Silicon nitride antifuse for use in diode-antifuse memory arrays |
| US6888750B2 (en) * | 2000-04-28 | 2005-05-03 | Matrix Semiconductor, Inc. | Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication |
| KR100821456B1 (ko) | 2000-08-14 | 2008-04-11 | 샌디스크 쓰리디 엘엘씨 | 밀집한 어레이 및 전하 저장 장치와, 그 제조 방법 |
| US7352199B2 (en) | 2001-02-20 | 2008-04-01 | Sandisk Corporation | Memory card with enhanced testability and methods of making and using the same |
| US6897514B2 (en) | 2001-03-28 | 2005-05-24 | Matrix Semiconductor, Inc. | Two mask floating gate EEPROM and method of making |
| US6525953B1 (en) | 2001-08-13 | 2003-02-25 | Matrix Semiconductor, Inc. | Vertically-stacked, field-programmable, nonvolatile memory and method of fabrication |
| US6593624B2 (en) | 2001-09-25 | 2003-07-15 | Matrix Semiconductor, Inc. | Thin film transistors with vertically offset drain regions |
| US6843421B2 (en) | 2001-08-13 | 2005-01-18 | Matrix Semiconductor, Inc. | Molded memory module and method of making the module absent a substrate support |
| US6841813B2 (en) * | 2001-08-13 | 2005-01-11 | Matrix Semiconductor, Inc. | TFT mask ROM and method for making same |
| US6624485B2 (en) | 2001-11-05 | 2003-09-23 | Matrix Semiconductor, Inc. | Three-dimensional, mask-programmed read only memory |
| US6731011B2 (en) | 2002-02-19 | 2004-05-04 | Matrix Semiconductor, Inc. | Memory module having interconnected and stacked integrated circuits |
| US6853049B2 (en) | 2002-03-13 | 2005-02-08 | Matrix Semiconductor, Inc. | Silicide-silicon oxide-semiconductor antifuse device and method of making |
| US6737675B2 (en) | 2002-06-27 | 2004-05-18 | Matrix Semiconductor, Inc. | High density 3D rail stack arrays |
| JP5024530B2 (ja) * | 2007-05-08 | 2012-09-12 | 大学共同利用機関法人情報・システム研究機構 | 三次元集積電気回路の配線構造及びそのレイアウト方法 |
| US8907392B2 (en) * | 2011-12-22 | 2014-12-09 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor memory device including stacked sub memory cells |
| US9627395B2 (en) | 2015-02-11 | 2017-04-18 | Sandisk Technologies Llc | Enhanced channel mobility three-dimensional memory structure and method of making thereof |
| US9478495B1 (en) | 2015-10-26 | 2016-10-25 | Sandisk Technologies Llc | Three dimensional memory device containing aluminum source contact via structure and method of making thereof |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57106181A (en) * | 1980-12-24 | 1982-07-01 | Toshiba Corp | Integrated circuit |
| JPH0664606B2 (ja) * | 1982-06-11 | 1994-08-22 | ソニー株式会社 | 画像処理装置 |
| JPS5950583A (ja) * | 1982-09-16 | 1984-03-23 | Fujitsu Ltd | 半導体装置 |
| US4603401A (en) * | 1984-04-17 | 1986-07-29 | University Of Pittsburgh | Apparatus and method for infrared imaging |
-
1984
- 1984-06-18 JP JP59123918A patent/JPS613450A/ja active Granted
-
1985
- 1985-02-15 US US06/702,139 patent/US4672577A/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004507020A (ja) * | 2000-08-14 | 2004-03-04 | マトリックス セミコンダクター インコーポレイテッド | モジュラーメモリデバイス |
Also Published As
| Publication number | Publication date |
|---|---|
| US4672577A (en) | 1987-06-09 |
| JPS613450A (ja) | 1986-01-09 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |