JPH0563940B2 - - Google Patents

Info

Publication number
JPH0563940B2
JPH0563940B2 JP58043099A JP4309983A JPH0563940B2 JP H0563940 B2 JPH0563940 B2 JP H0563940B2 JP 58043099 A JP58043099 A JP 58043099A JP 4309983 A JP4309983 A JP 4309983A JP H0563940 B2 JPH0563940 B2 JP H0563940B2
Authority
JP
Japan
Prior art keywords
insulating film
etching
film
forming
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58043099A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59169151A (ja
Inventor
Ryoichi Hazuki
Takahiko Morya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP4309983A priority Critical patent/JPS59169151A/ja
Publication of JPS59169151A publication Critical patent/JPS59169151A/ja
Publication of JPH0563940B2 publication Critical patent/JPH0563940B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP4309983A 1983-03-17 1983-03-17 半導体装置の製造方法 Granted JPS59169151A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4309983A JPS59169151A (ja) 1983-03-17 1983-03-17 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4309983A JPS59169151A (ja) 1983-03-17 1983-03-17 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS59169151A JPS59169151A (ja) 1984-09-25
JPH0563940B2 true JPH0563940B2 (en, 2012) 1993-09-13

Family

ID=12654385

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4309983A Granted JPS59169151A (ja) 1983-03-17 1983-03-17 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS59169151A (en, 2012)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0821572B2 (ja) * 1985-07-10 1996-03-04 ソニー株式会社 半導体装置の製造方法
FR2587838B1 (fr) * 1985-09-20 1987-11-27 Radiotechnique Compelec Procede pour aplanir la surface d'un dispositif semi-conducteur utilisant du nitrure de silicium comme materiau isolant
FR2588418B1 (fr) * 1985-10-03 1988-07-29 Bull Sa Procede de formation d'un reseau metallique multicouche d'interconnexion des composants d'un circuit integre de haute densite et circuit integre en resultant
US4789648A (en) * 1985-10-28 1988-12-06 International Business Machines Corporation Method for producing coplanar multi-level metal/insulator films on a substrate and for forming patterned conductive lines simultaneously with stud vias
US4767724A (en) * 1986-03-27 1988-08-30 General Electric Company Unframed via interconnection with dielectric etch stop
JPS63119534A (ja) * 1986-11-08 1988-05-24 Mitsubishi Electric Corp 半導体装置の製造方法
US4966870A (en) * 1988-04-14 1990-10-30 International Business Machines Corporation Method for making borderless contacts
JP2769331B2 (ja) * 1988-09-12 1998-06-25 株式会社日立製作所 半導体集積回路の製造方法
EP0425787A3 (en) * 1989-10-31 1993-04-14 International Business Machines Corporation Method for fabricating high circuit density, self-aligned metal lines to contact windows
US5141897A (en) * 1990-03-23 1992-08-25 At&T Bell Laboratories Method of making integrated circuit interconnection
US5286674A (en) * 1992-03-02 1994-02-15 Motorola, Inc. Method for forming a via structure and semiconductor device having the same
US5702981A (en) * 1995-09-29 1997-12-30 Maniar; Papu D. Method for forming a via in a semiconductor device
JPH09115888A (ja) * 1995-10-13 1997-05-02 Nec Corp 半導体装置の製造方法
KR100287178B1 (ko) * 1998-08-27 2001-04-16 윤종용 반도체소자의콘택홀형성방법
JP3304898B2 (ja) 1998-11-20 2002-07-22 株式会社村田製作所 複合高周波部品及びそれを用いた移動体通信装置
JP2000294631A (ja) * 1999-04-05 2000-10-20 Mitsubishi Electric Corp 半導体装置及びその製造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5135292A (en) * 1974-09-20 1976-03-25 Matsushita Electric Ind Co Ltd Handotaisochi oyobi sonoseizohoho
JPS5731155A (en) * 1980-07-31 1982-02-19 Fujitsu Ltd Manufacture of semiconductor device
JPH0230312B2 (ja) * 1981-07-08 1990-07-05 Kazutami Saito Bensosuijokajunkansochi

Also Published As

Publication number Publication date
JPS59169151A (ja) 1984-09-25

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