JPH0561671B2 - - Google Patents

Info

Publication number
JPH0561671B2
JPH0561671B2 JP58177715A JP17771583A JPH0561671B2 JP H0561671 B2 JPH0561671 B2 JP H0561671B2 JP 58177715 A JP58177715 A JP 58177715A JP 17771583 A JP17771583 A JP 17771583A JP H0561671 B2 JPH0561671 B2 JP H0561671B2
Authority
JP
Japan
Prior art keywords
cpu
shared memory
general
chip
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58177715A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6068462A (ja
Inventor
Kenji Hara
Ikuo Furuya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yaskawa Electric Corp
Original Assignee
Yaskawa Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yaskawa Electric Corp filed Critical Yaskawa Electric Corp
Priority to JP17771583A priority Critical patent/JPS6068462A/ja
Publication of JPS6068462A publication Critical patent/JPS6068462A/ja
Publication of JPH0561671B2 publication Critical patent/JPH0561671B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
JP17771583A 1983-09-24 1983-09-24 マルチプロセッサ・システム Granted JPS6068462A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17771583A JPS6068462A (ja) 1983-09-24 1983-09-24 マルチプロセッサ・システム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17771583A JPS6068462A (ja) 1983-09-24 1983-09-24 マルチプロセッサ・システム

Publications (2)

Publication Number Publication Date
JPS6068462A JPS6068462A (ja) 1985-04-19
JPH0561671B2 true JPH0561671B2 (cs) 1993-09-06

Family

ID=16035839

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17771583A Granted JPS6068462A (ja) 1983-09-24 1983-09-24 マルチプロセッサ・システム

Country Status (1)

Country Link
JP (1) JPS6068462A (cs)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0682353B2 (ja) * 1989-03-03 1994-10-19 株式会社日立製作所 マルチプロセッサシステム

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5111534A (cs) * 1974-07-19 1976-01-29 Tokyo Shibaura Electric Co
US4368514A (en) * 1980-04-25 1983-01-11 Timeplex, Inc. Multi-processor system

Also Published As

Publication number Publication date
JPS6068462A (ja) 1985-04-19

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